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參數(shù)資料
| 型號： | 3D7522 |
| 廠商： | Data Delay Devices, Inc. |
| 英文描述： | MONOLITHIC MANCHESTER DECODER |
| 中文描述： | 整裝曼徹斯特解碼器 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 156K |
| 代理商： | 3D7522 |
3D7522
MONOLITHIC MANCHESTER
DECODER
(SERIES 3D7522)
FEATURES
All-silicon, low-power CMOS
technology
TTL/CMOS compatible inputs and
outputs
Vapor phase, IR and wave
solderable
Low ground bounce noise
Maximum data rate:
50 MBaud
Data rate range:
±
15%
Lock-in time:
1 bit
FUNCTIONAL DESCRIPTION
The 3D7522 product family consists of monolithic CMOS Manchester
Decoders. The unit accepts at the RX input a bi-phase-level,
embedded-clock signal. In this encoding mode, a logic one is
represented by a high-to-low transition within the bit cell, while a logic
zero is represented by a low-to-high transition. The recovered clock
and data signals are presented on CLK and DATB, respectively, with
the data signal inverted. The operating baud rate (in MBaud) is specified by the dash number. The input
baud rate may vary by as much as
±
15% from the nominal device baud rate without compromising the
integrity of the information received.
Because the 3D7522 is not PLL-based, it does not require a long preamble in order to lock onto the
received signal. Rather, the device requires at most one bit cell before the data presented at the output is
valid. This is extremely useful in cases where the information arrives in bursts and the input is otherwise
turned off.
The all-CMOS 3D7522 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL Manchester Decoders. It is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is
offered in space saving surface mount 8-pin and 14-pin SOICs.
TABLE 1: PART NUMBER SPECIFICATIONS
data
delay
devices,
inc.
3
PACKAGES
8
7
6
5
1
2
3
4
RX
CLK
N/C
GND
VDD
N/C
N/C
DATB
3D7522Z-xxx SOIC (.150)
14
13
12
11
10
9
8
1
2
3
4
5
6
7
RX
N/C
N/C
CLK
N/C
N/C
GND
VDD
N/C
N/C
N/C
N/C
N/C
DATB
3D7522D-xxx SOIC (.150)
For mechanical dimensions, click
here
.
For package marking details, click
here
.
PIN DESCRIPTIONS
RX
Signal Input
CLK
Signal Output (Clock)
DATB Signal Output (Data)
VDD
+5 Volts
GND
Ground
PART
NUMBER
3D7522-0.5
3D7522-1
3D7522-5
3D7522-10
3D7522-20
3D7522-25
3D7522-50
BAUD RATE (MBaud)
Nominal
Minimum
0.50
1.00
5.00
10.00
20.00
25.00
50.00
Maximum
0.43
0.85
4.25
8.50
17.00
21.25
42.50
0.57
1.15
5.75
11.50
23.00
28.75
57.50
NOTES: Any baud rate between 0.5 and 50 MBaud not shown is also available at no extra cost.
2007 Data Delay Devices
Doc #06002
10/31/2007
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 3D7522-0.5 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER DECODER |
| 3D7522-1 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER DECODER |
| 3D7522-10 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER DECODER |
| 3D7522-20 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER DECODER |
| 3D7522-25 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC MANCHESTER DECODER |
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