參數(shù)資料
型號(hào): 3GPA576F-30T-FREQ
廠商: EUROQUARTZ LTD
元件分類: VCXO, clock
英文描述: VCXO, CLOCK, 60 MHz - 240 MHz, LVPECL OUTPUT
封裝: ROHS COMPLIANT, SMD, 6 PIN
文件頁(yè)數(shù): 1/1頁(yè)
文件大?。?/td> 111K
代理商: 3GPA576F-30T-FREQ
EUROQUARTZ LIMITED Blacknell Lane CREWKERNE Somerset UK TA18 7HE
Tel: +44 (0)1460 230000 Fax: +44 (0)1460 230001
info@euroquartz.co.uk
www.euroquartz.co.uk
EURO QUARTZ
7 x 5 x 1.8mm SMD
GPA576 PECL VCXO
DESCRIPTION
Frequency range 60MHz to 240MHz
LVPECL Output
Supply Voltage 3.3 VDC
Phase jitter 0.2ps typical
Pull range from ±30ppm to ±150ppm
OUTLINE & DIMENSIONS
Frequency Range:
60.0MHz to 240.0MHz
Supply Voltage:
3.3 VDC ±5%
Output Logic:
LVPECL
RMS Period Jitter
60.0MHz ~ 120MHz:
2.5ps typical
120MHz ~ 240MHz:
4.7ps typical
Peak to Peak Jitter
60.0MHz ~ 120MHz:
17.5ps typical
120MHz ~ 240MHz:
24.5ps typical
Phase Jitter:
0.2ps typical
Initial Frequency Accuracy:
Tune to the nominal frequency
with Vc= 1.65 ±0.2VDC
Output Voltage HIGH (1):
Vdd-1.025V minimum
Vdd-0.880V maximum
Output Voltage LOW (0):
Vdd-1.810V minimum
Vdd-1.620V maximum
(RL=50
to Vdd-2V)
Pulling Range:
From ±30ppm to ±150ppm
Control Voltage Range:
1.65 ±0.35 Volts
Temperature Stability:
See table
Output Load:
50W into Vdd or Thevenin equiv.
Rise/Fall Times:
0.5ns typ., 0.7ns max.
20% Vdd to 80% Vdd
Duty Cycle:
50% ±5%
(Measured at Vdd-1.3V)
Start-up Time:
10ms maximum, 5ms typical
Current Consumption:
75mA maximum at 212.5MHz
80mA maximum at 622.08MHz
Static Discharge Protection:
2kV maximum
Storage Temperature:
-55° to +150°C
Ageing:
±2ppm per year maximum
Enable/Disable:
See table
RoHS Status:
Fully compliant
SPECIFICATION
PART NUMBERING
Example:
3GPA576B-80N-60.000
Stability Code
FREQUENCY STABILITY
A
25
0°~+70°C
B
50
0°~+70°C
C
100
0°~+70°C
D
25
-40°~+85°C
E
50
-40°~+85°C
F
100
-40°~+85°C
If non-standard frequency stability is required
Use ‘I’ followed by stability, i.e. I20 for ±20ppm
Stability ±ppm
Supply Voltage
3 = +3.3V
Series Designator
GPA576
Stability over temperature range
(See table)
Pullability in ±ppm
Pullability determinator
N = minimum
M = maximum
T = Typical
Frequency in MHz
GPA576 VCXOs are packaged in a 6 pad 7mm x 5mm SMD package.
Typical phase jitter for GPA series VCXOs is 0.2 ps. Output is LVPECL.
Applications include phase lock loop, SONET/ATM, set-top boxes,
MPEG , audio/video modulation, video game consoles and HDTV.
Temp. Range
Tristate Pad
Status
ENABLE/DISABLE FUNCTION
LVPECL and Complimentary LVPECL enabled
Both outputs are disabled (high impedance)
Both outputs are enabled
Output Status
Not connected
Below 0.3Vdd
(Ref. to ground)
Above 0.7Vdd
(Ref. to ground)
60.0MHz to 240.0MHz
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