參數(shù)資料
型號(hào): 4011B
廠商: NXP Semiconductors N.V.
英文描述: Quadruple 2-input NAND gate
中文描述: 四2輸入與非門
文件頁數(shù): 3/3頁
文件大?。?/td> 25K
代理商: 4011B
January 1995
3
Philips Semiconductors
Product specification
Quadruple 2-input NAND gate
HEF4011B
gates
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
SYMBOL
TYP
MAX
TYPICAL EXTRAPOLATION
FORMULA
28 ns
+
(0,55 ns/pF) C
L
14 ns
+
(0,23 ns/pF) C
L
12 ns
+
(0,16 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
Propagation delays
I
n
O
n
5
55
25
20
60
30
20
60
30
20
110
45
35
120
60
40
120
60
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
15
t
PHL
; t
PLH
Output transition times
HIGH to LOW
5
10
15
5
10
15
t
THL
LOW to HIGH
t
TLH
V
DD
V
TYPICAL FORMULA FOR P (
μ
W)
Dynamic power
dissipation per
package (P)
5
1300 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
6000 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
20 100 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
10
15
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