參數(shù)資料
型號(hào): 4071B
廠商: NXP Semiconductors N.V.
英文描述: Quadruple 2-input OR gate
中文描述: 四2輸入或門(mén)
文件頁(yè)數(shù): 3/3頁(yè)
文件大?。?/td> 25K
代理商: 4071B
January 1995
3
Philips Semiconductors
Product specification
Quadruple 2-input OR gate
HEF4071B
gates
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
SYMBOL
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
I
n
O
n
HIGH to LOW
5
55
25
20
45
20
15
60
30
20
60
30
20
115
50
35
90
45
30
120
60
40
120
60
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
28 ns
15 ns
12 ns
18 ns
9 ns
7 ns
10 ns
9 ns
6 ns
10 ns
9 ns
6 ns
+
+
+
+
+
+
+
+
+
+
+
+
(0,55 ns/pF) C
L
(0,23 ns/pF) C
L
(0,16 ns/pF) C
L
(0,55 ns/pF) C
L
(0,23 ns/pF) C
L
(0,16 ns/pF) C
L
(1,0 ns/pF) C
L
(0,42 ns/pF) C
L
(0,28 ns/pF) C
L
(1,0 ns/pF) C
L
(0,42 ns/pF) C
L
(0,28 ns/pF) C
L
10
15
5
10
15
t
PHL
LOW to HIGH
t
PLH
Output transition times
HIGH to LOW
5
10
15
5
10
15
t
THL
LOW to HIGH
t
TLH
V
DD
V
TYPICAL FORMULA FOR P (
μ
W)
Dynamic power
dissipation per
package (P)
5
1150 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
4800 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
19 700 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
10
15
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