參數(shù)資料
型號： 4606X-102-102
英文描述： Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
中文描述： WIDERSTAND NETZWERK DICKFILM一千5ST
文件頁數(shù)： 51/62頁
文件大?。?/td> 1883K
代理商： 4606X-102-102
Specifications are subject to change without notice.
331
Use Bourns Networks To:
Match impedance between memory driver and the DRAM
array.
Minimize reflections and ringing in DRAM inputs.
Prevent undershoot of RAS, CAS, and WE signals which
may result in latch-up of DRAM inputs
Improve system performance by allowing faster setting
times for DRAM inputs.
Need For Damping
The address lines (RAS, CAS) and control lines (WE) of
dynamic RAM arrays are driven in parallel, causing significant
loading on the driver of the DRAM arrays. Each DRAM control
input (WE) has capacitive loading between 5pF to 7pF, while
each address line input has about a 10pF load.
Thus each DRAM input can be modeled as a transmission line
with distributed inductance and capacitance. If not properly ter-
minated, signal reflections and ringing on the line will result,
adversely affecting the performance of the memory system. The
effects on signal transitions will be:
1. Increased settling time delay on low-to-high transitions.
2. Voltage undershoot on high-to-low transitions.
Increased settling time due to ringing reduces system perfor-
mance because the design has to allow for the settling delay
before sampling the signal. Undershoot, by bringing the input
voltage below 0 volts, can damage the driver IC as well as alter
the DRAM’s internal address register contents, causing potential
loss of data.
TIMING
REFERENCE
MEMORY
CONTROL
DATA
SYSTEM DATA BUS
TIMING
CONTROLLERS
DATA
CPU
ADDRESS
DYNAMIC
MEMORY
CONTROL
ADDRESS
RAS
CAS
WE
DYNAMIC
MEMORY
ARRAY
BLOCK DIAGRAM OF DRAM SYSTEM
EFFECT OF DAMPING RESISTOR
WITHOUT
DAMPING
RESISTOR
WITH
DAMPING
RESISTOR
Courtesy of B. Narasimhan and J. Shaffer, Micron Techology Corporation.
t1
t2
1
V
"HIGH"
LOGIC
LEVEL
COMPARISON OF UNDERSHOOTS
WITHOUT
DAMPING RESISTOR
WITH
DAMPING RESISTOR
t1 - TIME TO ACCEPTABLE "LOW" LOGIC LEVEL FOR
DRIVER WITHOUT DAMPING RESISTOR
t2 - TIME TO ACCEPTABLE "LOW" LOGIC
LEVEL WITHDAMPING RESISTOR
DRAM Applications
相關PDF資料
PDF描述
4606X-102-103 WIDERSTAND NETZWERK DICKFILM 10K 5ST
4606X-102-104 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
4606X-102-105 WIDERSTAND NETZWERK DICKFILM 1M 5ST
4606X-102-222 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
4606X-102-472 WIDERSTAND NETZWERK DICKFILM 4K7 5ST
相關代理商/技術參數(shù)
參數(shù)描述
4606X-102-102LF 功能描述:電阻器網(wǎng)絡與陣列 6pins 1Kohms Isolated RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類型:Networks 電路類型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類型:SMD/SMT 封裝:Reel
4606X-102-102LF 制造商:Bourns Inc 功能描述:RESISTORS NETWORKS THICK FILM NETWORK C
4606X-102-103 功能描述:電阻器網(wǎng)絡與陣列 6Pin 2% 10K Isolated RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類型:Networks 電路類型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類型:SMD/SMT 封裝:Reel
4606X-102-103F 功能描述:電阻器網(wǎng)絡與陣列 6Pin 1% 10K Isolated RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類型:Networks 電路類型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類型:SMD/SMT 封裝:Reel
4606X-102-103FLF 功能描述:RES ARRAY 10K OHM 3 RES 6-SIP RoHS:是 類別:電阻器 >> 網(wǎng)絡、陣列 系列:4600X 其它有關文件:4300 vs. 4600 Model Bulletin 產(chǎn)品變化通告:Marking Change May 2012 產(chǎn)品目錄繪圖:4(3,6)00 Series Circuit Isolated 4300R Series Side 1 4300R Series Side 2 標準包裝:25 系列:4300R 電路類型:隔離 電阻（歐姆）:82 電阻數(shù):4 引腳數(shù):8 每個元件的功率:300mW 容差:±2% 溫度系數(shù):±100ppm/°C 應用:- 安裝類型:通孔 封裝/外殼:8-SIP 供應商設備封裝:- 尺寸/尺寸:0.784" L x 0.085" W（19.92mm x 2.16mm） 高度:0.195"（4.95mm） 包裝:散裝 工作溫度:-55°C ~ 125°C 其它名稱:4308R-102-820LF-ND4308R-2-820LF
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*