參數(shù)資料
型號(hào)： 4610X-101-102
英文描述： Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
中文描述： WIDERSTAND NETZWERK DICKFILM一千5ST
文件頁(yè)數(shù)： 51/62頁(yè)
文件大小： 1883K
代理商： 4610X-101-102
Specifications are subject to change without notice.
331
Use Bourns Networks To:
Match impedance between memory driver and the DRAM
array.
Minimize reflections and ringing in DRAM inputs.
Prevent undershoot of RAS, CAS, and WE signals which
may result in latch-up of DRAM inputs
Improve system performance by allowing faster setting
times for DRAM inputs.
Need For Damping
The address lines (RAS, CAS) and control lines (WE) of
dynamic RAM arrays are driven in parallel, causing significant
loading on the driver of the DRAM arrays. Each DRAM control
input (WE) has capacitive loading between 5pF to 7pF, while
each address line input has about a 10pF load.
Thus each DRAM input can be modeled as a transmission line
with distributed inductance and capacitance. If not properly ter-
minated, signal reflections and ringing on the line will result,
adversely affecting the performance of the memory system. The
effects on signal transitions will be:
1. Increased settling time delay on low-to-high transitions.
2. Voltage undershoot on high-to-low transitions.
Increased settling time due to ringing reduces system perfor-
mance because the design has to allow for the settling delay
before sampling the signal. Undershoot, by bringing the input
voltage below 0 volts, can damage the driver IC as well as alter
the DRAM’s internal address register contents, causing potential
loss of data.
TIMING
REFERENCE
MEMORY
CONTROL
DATA
SYSTEM DATA BUS
TIMING
CONTROLLERS
DATA
CPU
ADDRESS
DYNAMIC
MEMORY
CONTROL
ADDRESS
RAS
CAS
WE
DYNAMIC
MEMORY
ARRAY
BLOCK DIAGRAM OF DRAM SYSTEM
EFFECT OF DAMPING RESISTOR
WITHOUT
DAMPING
RESISTOR
WITH
DAMPING
RESISTOR
Courtesy of B. Narasimhan and J. Shaffer, Micron Techology Corporation.
t1
t2
1
V
"HIGH"
LOGIC
LEVEL
COMPARISON OF UNDERSHOOTS
WITHOUT
DAMPING RESISTOR
WITH
DAMPING RESISTOR
t1 - TIME TO ACCEPTABLE "LOW" LOGIC LEVEL FOR
DRIVER WITHOUT DAMPING RESISTOR
t2 - TIME TO ACCEPTABLE "LOW" LOGIC
LEVEL WITHDAMPING RESISTOR
DRAM Applications
相關(guān)PDF資料
PDF描述
4610X-101-103 WIDERSTAND NETZWERK DICKFILM 10K 5ST
4610X-101-104 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
4610X-101-105 WIDERSTAND NETZWERK DICKFILM 1M 5ST
4610X-101-151 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
4610X-101-152 WIDERSTAND NETZWERK DICKFILM 1K5 5ST
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
4610X-101-102F 功能描述:電阻器網(wǎng)絡(luò)與陣列 10Pin 1% 1K RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類(lèi)型:Networks 電路類(lèi)型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類(lèi)型:SMD/SMT 封裝:Reel
4610X-101-102FLF 功能描述:RES ARRAY 1K OHM 9 RES 10-SIP RoHS:是 類(lèi)別:電阻器 >> 網(wǎng)絡(luò)、陣列 系列:4600X 標(biāo)準(zhǔn)包裝:2,000 系列:SOMC 電路類(lèi)型:隔離 電阻（歐姆）:330 電阻數(shù):7 引腳數(shù):14 每個(gè)元件的功率:160mW 容差:±2% 溫度系數(shù):±100ppm/°C 應(yīng)用:- 安裝類(lèi)型:表面貼裝 封裝/外殼:14-SOIC（0.220"，5.59mm 寬） 供應(yīng)商設(shè)備封裝:- 尺寸/尺寸:0.390" L x 0.220" W（9.91mm x 5.59mm） 高度:0.085"（2.16mm） 包裝:帶卷 (TR) 工作溫度:-55°C ~ 150°C
4610X-101-102LF 功能描述:電阻器網(wǎng)絡(luò)與陣列 10pins 1Kohms Bussed RoHS:否 制造商:Vishay/Thin Film 產(chǎn)品類(lèi)型:Networks 電路類(lèi)型:Divider 電阻器數(shù)量: 電阻數(shù)值:10 kOhms 容差:0.1 % 溫度系數(shù): 管腳數(shù)量:3 工作溫度范圍:- 55 C to + 155 C 尺寸:1.02 mm W x 3.05 mm L x 1.4 mm H 引線間隔: 端接類(lèi)型:SMD/SMT 封裝:Reel
4610X-101-102LF 制造商:Bourns Inc 功能描述:RESISTORS NETWORKS THICK FILM NETWORK C
4610X101103 制造商:BOU 功能描述:SRN10B310
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*