參數(shù)資料
型號： 492A-FREQ-DE0
廠商： FOX ELECTRONICS
元件分類： XO, clock
英文描述： CRYSTAL OSCILLATOR, CLOCK, 1.8 MHz - 50 MHz, HCMOS OUTPUT
封裝： ROHS COMPLIANT, SMD, 4 PIN
文件頁數(shù)： 1/2頁
文件大?。?/td> 174K
代理商： 492A-FREQ-DE0
FOXElectronics 5570 Enterprise Parkway Fort Myers, Florida 33905 USA +1.239.693.0099 FAX +1.239.693.1554 http://www.foxonline.com
EMEA Tel/Fax: +44 .1767.312632 | Asia Hong Kong Tel: +852.2854.4285 Fax +852.2854.4282
| Japan Tel: +81.3.3374/2079 Fax: +81.3.3374.5221
2009 FOX ELECTRONICS | ISO9001:2000 Certified
FEATURES
3.3V Operation
Standby Function
Tape and Reel (1,000 pcs. STD)
Frequency
Stability1
±100PPM
±50PPM
±25PPM
±20PPM
Operating
Temperature (C)
-10 ~ +70
-40 ~ +85
-10 ~ +70
-40 ~ +85
-10 ~ +70
-40 ~ +85
-10 ~ +70
Frequency
Range (MHz)
1.800 ~ 50.000
F530LA
F530LAR
F535LA
F535LAR
F536LA
F536LAR
F538LA
OPTIONS
5.0V (F550L) Version Available
1.800 ~ 50.000 MHz
-55C ~ +125C
3.3V ± 5%
2.5mA
3.5mA
45% ~ 55%
12nS
10% VDD
90% VDD Min
2mA Min
-2mA Min
15pF
1A
5mS
150nS
5mS
260C / 10 Seconds
1
Au
PARAMETERS
Frequency Range
(FO)
Storage Temperature Range (TSTG)
Supply Voltage
(VDD)
Input Current
(IDD) (No Load)
1.800 ~ 32.000 MHz
32.000+ ~ 50.000 MHz
Output Symmetry (50% VDD)
Rise Time (10% ~ 90% VDD) (TR)
Fall Time (90% ~ 10% VDD) (TF)
Output Voltage
(VOL)
(VOH)
Output Current
(IOL)
(IOH)
Output Load
(HCMOS)
Standby Current
Start-up Time
(TS)
Output Disable Time 2
Output Enable Time 2
Reflow Soldering Temp
Moisture Sensitivity Level (MSL)
Termination Finish
ELECTRICAL CHARACTERISTICS
MAX (unless otherwise noted)
OUTPUT (Pin 3)
ACTIVE
High Z
ENAbLE / DISAbLE FUNCTION
INH (Pin 1)
OPEN 2
'1' Level VIH
≥ 70% VDD
'0' Level VIL
≤ 30% VDD
Model
Number
Part Number
474A-Frequency-xxxxx
475A-Frequency-xxxxx
476A-Frequency-xxxxx
550A-Frequency-xxxxx
492A-Frequency-xxxxx
636A-Frequency-xxxxx
546A-Frequency-xxxxx
PART NUMbER SELECTION Learn More - Internet Required
HCMOS 5x3.2mm 3.3V SMD Oscillator
Rev. 5/7/2009
RoHS Compliant / Pb Free
Model: F530LA SERIES
Page 1 of 2
1 Inclusive operating temperature range, input voltage change, load change, aging, shock, and vibration.
2
An internal pullup resistor from pin 1 to pin 4 allows active output if pin 1 is left open.
Note: A 0.01F capacitor should be placed between VDD (Pin 4) and GND (Pin2) to minimize power
supply noise.
Drawing is for reference to critical specifications defined by size measurements.
Certain non-critical visual attributes, such as side castellations, reference pin shape, etc. may vary.
All specifications subject to change without notice.
Low Current
5.0 ± 0.2
1.3 Max
Solder Pad Layout
Recommended
3.2 ± 0.2
2.54±0.1
1.2
Pin Connections
#1 E/D
#2 GND
#3 Output
#4 V DD
1.0
2.25
1.24
2.54
1.29
# 1
# 2
# 4
# 3
# 1
# 2
# 3
# 4
Top
View
Bottom
View
Dot denotes
pin 1
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