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參數(shù)資料
| 型號： | 49F010 |
| 廠商： | Atmel Corp. |
| 元件分類： | 熱敏電阻 |
| 英文描述： | THERMISTOR, NTC; Series:B578; Thermistor type:NTC; Resistance:3kR; Tolerance, resistance:+/-1%; Beta value:3988; Temperature, lower limit, beta value:25(degree C); Temperature, upper limit, beta value:100(degree C); Temp, op. RoHS Compliant: Yes |
| 中文描述： | 1兆位128K的× 8 5伏只有閃存的CMOS |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 248K |
| 代理商： | 49F010 |
Temperature Under Bias................. -55
°C to +125°C
Storage Temperature...................... -65
°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
All Output Voltages
with Respect to Ground .............-0.6V to VCC + 0.6V
Voltage on OE
with Respect to Ground ................... -0.6V to +13.5V
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Absolute Maximum Ratings*
PRODUCT IDENTIFICATION: The product identification
mode identifies the device and manufacturer as Atmel. It
may be accessed by hardware or software operation. The
hardware operation mode can be used by an external pro-
grammer to identify the correct programming algorithm for
the Atmel product.
For details, see Operating Modes (for hardware operation)
or Software Product Identification. The manufacturer and
device code is the same for both modes.
DATA POLLING: The AT49F010/HF010 features DATA
polling to indicate the end of a program cycle. During a
program cycle an attempted read of the last byte loaded
will result in the complement of the loaded data on I/O7.
Once the program cycle has been completed, true data is
valid on all outputs and the next cycle may begin. DATA
polling may begin at any time during the program cycle.
Command Definition (in Hex)
Command
Sequence
Bus
Cycles
1st Bus
Cycle
2nd Bus
Cycle
3rd Bus
Cycle
4th Bus
Cycle
5th Bus
Cycle
6th Bus
Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read
1Addr
DOUT
Chip Erase
6
5555
AA
2AAA
55
5555
80
5555
AA
2AAA
55
5555
10
Byte
Program
4
5555
AA
2AAA
55
5555
A0
Addr
DIN
Boot Block
Lockout
(1)
6
5555
AA
2AAA
55
5555
80
5555
AA
2AAA
55
5555
40
Product ID
Entry
3
5555
AA
2AAA
55
5555
90
Product ID
Exit
(2)
3
5555
AA
2AAA
55
5555
F0
Product ID
Exit
(2)
1
XXXX
F0
Notes: 1. The 8K byte boot sector has the address range 00000H to 01FFFH.
2. Either one of the Product ID exit commands can be used.
TOGGLE BI T : I n ad di ti on t o DATA po ll ing the
AT49F010/HF010 provides another method for determin-
ing the end of a program or erase cycle. During a program
or erase operation, successive attempts to read data from
the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will
stop toggling and valid data will be read. Examining the
toggle bit may begin at any time during a program cycle.
HARDWARE DATA PROTECTION: Hardware features
pr otect ag ai nst i n a d ve r t e n t p r og r a m s t o th e
AT49F010/HF010 in the following ways: (a) VCC sense: if
VCC is below 3.8V (typical), the program function is inhib-
ited. (b) Program inhibit: holding any one of OE low, CE
high or WE high inhibits program cycles. (c) Noise filter:
Pulses of less than 15 ns (typical) on the WE or CE inputs
will not initiate a program cycle.
AT49F010/HF010
3
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