參數(shù)資料
型號(hào): 4N25GVSERIES
廠商: Vishay Intertechnology,Inc.
英文描述: Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits
中文描述: 與光電晶體管光電耦合器輸出
文件頁(yè)數(shù): 4/9頁(yè)
文件大?。?/td> 147K
代理商: 4N25GVSERIES
4N25(G)V/ 4N35(G)V Series
Vishay Telefunken
Rev. A4, 11–Jan–99
89
Maximum Safety Ratings (according to VDE 0884) see figure 1
This device is used for protective separation against electrical shock only within the maximum safety ratings.
This must be ensured by using protective circuits in the applications.
Input (Emitter)
Parameters
Test Conditions
Symbol
Value
Unit
Forward current
Isi
130
mA
Output (Detector)
Parameters
Test Conditions
Symbol
Value
Unit
Power dissipation
Tamb ≤ 25°C
Psi
265
mW
Coupler
Parameters
Test Conditions
Symbol
Value
Unit
Rated impulse voltage
VIOTM
6
kV
Safety temperature
Tsi
150
Insulation Rated Parameters (according to VDE 0884)
Parameter
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Partial discharge test voltage –
Routine test
100%, ttest = 1 s
Vpd
1.6
kV
Partial discharge test voltage – tTr = 60 s, ttest = 10 s,
VIOTM
6
kV
gg
Lot test (sample test)
Tr
test
(see figure 2)
Vpd
1.3
kV
Insulation resistance
VIO = 500 V
RIO
1012
W
VIO = 500 V,
Tamb = 100°C
RIO
1011
W
VIO = 500 V,
Tamb = 150°C
(construction test only)
RIO
109
W
0
25
50
75
125
0
50
100
150
200
300
P
T
otal
Power
Dissipation
(
mW
)
tot
Tsi – Safety Temperature ( °C )
150
94 9182
100
250
Phototransistor
Psi ( mW )
IR-Diode
Isi ( mA )
Figure 1. Derating diagram
V
IOTM
V
Pd
V
IOWM
V
IORM
V
t
4
t
3
t
test
t
stres
t
2
t
1
t
0
13930
t
Tr
= 60 s
t
1
, t
2
= 1 to 10 s
t
3
, t
4
= 1 s
t
test
= 10 s
t
stres
= 12 s
Figure 2. Test pulse diagram for sample test according to
DIN VDE 0884
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