參數(shù)資料
型號: 4N55/L2
廠商: ISOCOM LTD
元件分類: 光電耦合器
英文描述: 2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 0.4 Mbps
封裝: HERMETIC SEALED, CERAMIC, DIP-16
文件頁數(shù): 2/12頁
文件大小: 673K
代理商: 4N55/L2
ISOCOMLTD
For sales enquiries, or further information, please contact our sales office at:
Isocom Ltd, Hutton Close, Crowther Industrial Estate, District 3, Washington, NE38 0AH
Tel: +44 0191 4166 546 Fax: +44 0191 4155 055
2007 Copyright reserved to Isocom Limited
Page 10 of 13
QC 88000-C001: 2007
Typical Characteristics
TA = 25°C
Parameter
Symbol
Test Conditions
Notes
Min
Type
Max
Units
Temperature Coefficient
of Forward Voltage
VF
TA
IF = 20mA
1
-
-1.9
-
mV/°C
Input Capacitance
CIN
f = 1mhz, VF = 0
1
-
125
-
pF
Resistance (Input-Output)
RI-O
V1-0 = 500Vdc
1
-
10
12
-
Capacitance
(Input-
Output)
CI-O
f = 1MHz
1 & 4
-
1.0
-
pF
Input-Input Insulation
Leakage Current
II-I
45% Relative Humidity
VH = 500Vdc, t = 5S
5
-
1
-
pA
Capacitance (Input-Input)
CI-I
f = 1MHz
5
-
0.6
-
pF
Transistor DC Current
Gain
hFE
VO = 5V, IO = 3mA
1
-
130
-
Small Signal Current
Transfer Ratio
IO
IF
VCC = 5V, VO = 2V
1
-
20
-
%
Common Mode Transient
Immunity at Logic Low
Level Output
CML
IF = 16mA,RL = 8.2K
VCM = 10VP-P
VO (max) = 0.8V
1 & 7
-
-1000
-
V/S
Common Mode Transient
Immunity at Logic High
Level Output
CMH
IF = 0mA,RL = 8.2K
VCM = 10VP-P
VO (max) = 2.0V
1 & 6
-
1000
-
V/S
Bandwidth
BW
RL = 100
8
-
2
-
MHz
Notes (Apply typically to 16 pin package)
1. Each channel, where appropriate.
2. Current Transfer ratio is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times
100%. CTR is known to degrade slightly over the unit’s lifetime as a function of input current, temperature, signal duty
cycle and system on time. It is recommended that designers allow at least 20-25% guard band for CTR degradation.
3. Measured between pins 1 through 8 shorted together, and pins 9 through 16 shorted together.
4. Measured between each input pair shorted together, and the output pins for that channel shorted together.
5. Measured between pins 3 and 4 shorted together, and pins 7 and 8 shorted together.
6. CMH is the steepest slope (dV/dt) on the leading edge of the common mode pulse, VCM, for which the output will
remain in the logic high state (i.e., VO > 2.0V).
7. CML is the steepest slope (dV/dt) on the trailing edge of the common mode pulse, VCM, for which the output will
remain in the logic low state (i.e., VO < 0.8V).
8. Bandwidth is the frequency at which the AC output voltage is 3dB below the low frequency asymptote.
9. This is a momentary withstand test, not an operating condition.
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