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參數(shù)資料
| 型號： | 4TPB220ML |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages |
| 中文描述： | N溝道場效應(yīng)管同步降壓穩(wěn)壓控制器輸出電壓低 |
| 文件頁數(shù)： | 4/22頁 |
| 文件大小： | 602K |
| 代理商： | 4TPB220ML |
Application Information (Continued)
In this example, in order to maintain a 2% peak-to-peak
output voltage ripple and a 40% peak-to-peak inductor cur-
rent ripple, the required maximum ESR is 6m
. Three Sanyo
10MV5600AX capacitors in parallel will give an equivalent
ESR of 6m
. The total bulk capacitance of 16.8mF is
enough to supply even severe load transients. Using the
same capacitors for both input and output also keeps the bill
of materials simple.
MOSFETS
MOSFETS are a critical part of any switching controller and
have a direct impact on the system efficiency. In this case
the target efficiency is 85% and this is the variable that will
determine which devices are acceptable. Loss from the ca-
pacitors, inductors, and the LM2727 itself are detailed in the
Efficiency section, and come to about 0.54W. To meet the
target efficiency, this leaves 1.45W for the FET conduction
loss, gate charging loss, and switching loss. Switching loss
is particularly difficult to estimate because it depends on
many factors. When the load current is more than about 1 or
2 amps, conduction losses outweigh the switching and gate
charging losses. This allows FET selection based on the
R
DSON of the FET. Adding the FET switching and gate-
charging losses to the equation leaves 1.2W for conduction
losses. The equation for conduction loss is:
P
Cnd = D(I
2
o *RDSON *k) + (1-D)(I
2
o *RDSON *k)
The factor k is a constant which is added to account for the
increasing R
DSON of a FET due to heating. Here, k = 1.3. The
Si4442DY has a typical R
DSON of 4.1m
. When plugged into
the equation for P
CND the result is a loss of 0.533W. If this
design were for a 5V to 2.5V circuit, an equal number of
FETs on the high and low sides would be the best solution.
With the duty cycle D = 0.24, it becomes apparent that the
low side FET carries the load current 76% of the time.
Adding a second FET in parallel to the bottom FET could
improve the efficiency by lowering the effective R
DSON. The
lower the duty cycle, the more effective a second or even
third FET can be. For a minimal increase in gate charging
loss (0.054W) the decrease in conduction loss is 0.15W.
What was an 85% design improves to 86% for the added
cost of one SO-8 MOSFET.
CONTROL LOOP COMPONENTS
The circuit is this design example and the others shown in
the Example Circuits section have been compensated to
improve their DC gain and bandwidth. The result of this
compensation is better line and load transient responses.
For the LM2727, the top feedback divider resistor, Rfb2, is
also a part of the compensation. For the 10A, 5V to 1.2V
design, the values are:
Cc1 = 4.7pF 10%, Cc2 = 1nF 10%, Rc = 229k
1%. These
values give a phase margin of 63 and a bandwidth of
29.3kHz.
SUPPORT CAPACITORS AND RESISTORS
The Cinx capacitors are high frequency bypass devices,
designed to filter harmonics of the switching frequency and
input noise. Two 1F ceramic capacitors with a sufficient
voltage rating (10V for the Circuit of Figure 3) will work well
in almost any case.
Rbypass and Cbypass are standard filter components de-
signed to ensure smooth DC voltage for the chip supply and
for the bootstrap structure, if it is used. Use 10
for the
resistor and a 2.2F ceramic for the cap. Cb is the bootstrap
capacitor, and should be 0.1F. (In the case of a separate,
higher supply to the BOOTV pin, this 0.1F cap can be used
to bypass the supply.) Using a Schottky device for the boot-
strap diode allows the minimum drop for both high and low
side drivers. The On Semiconductor BAT54 or MBR0520
work well.
Rp is a standard pull-up resistor for the open-drain power
good signal, and should be 10k
. If this feature is not
necessary, it can be omitted.
R
CS is the resistor used to set the current limit. Since the
design calls for a peak current magnitude (Io + 0.5 *
I
o)of
12A, a safe setting would be 15A. (This is well below the
saturation current of the output inductor, which is 25A.)
Following the equation from the Current Limit section, use a
3.3k
resistor.
R
FADJ is used to set the switching frequency of the chip.
Following the equation in the Theory of Operation section,
the closest 1% tolerance resistor to obtain f
SW = 300kHz is
88.7k
.
C
SS depends on the users requirements. Based on the
equation for C
SS in the Theory of Operation section, for a
3ms delay, a 12nF capacitor will suffice.
EFFICIENCY CALCULATIONS
A reasonable estimation of the efficiency of a switching
controller can be obtained by adding together the loss is
each current carrying element and using the equation:
The following shows an efficiency calculation to complement
the Circuit of Figure 3. Output power for this circuit is 1.2V x
10A = 12W.
Chip Operating Loss
P
IQ =IQ-VCC *VCC
2mA x 5V = 0.01W
FET Gate Charging Loss
P
GC =n*VCC *QGS *fOSC
The value n is the total number of FETs used. The Si4442DY
has a typical total gate charge, Q
GS, of 36nC and an rds-on of
4.1m
. For a single FET on top and bottom:
2*5*36E
-9*300,000 = 0.108W
FET Switching Loss
P
SW =0.5*Vin *IO *(tr +tf)* fOSC
The Si4442DY has a typical rise time t
r and fall time tf of 11
and 47ns, respectively. 0.5*5*10*58E
-9*300,000 = 0.435W
LM2727/LM2737
www.national.com
12
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|---|---|
| 4TPB220ML | 制造商:SANYO Semiconductor Co Ltd 功能描述:CAPACITOR 220UF 4V |
| 4TPB330ML | 功能描述:鉭質(zhì)電容器-SMD聚合物 4volts 330uF ESR 40mohm RoHS:否 制造商:Kemet 電容:33 uF 電壓額定值:50 V ESR:40 mOhms 容差:20 % 工作溫度范圍: 外殼代碼 - in:2917 外殼代碼 - mm:7343 高度:4 mm 制造商庫存號:X Case 系列:T543 產(chǎn)品: 封裝:Reel |
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| 4TPB470M | 制造商:SANYO Semiconductor Co Ltd 功能描述:CAPACITOR 470UF 4V |
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