參數(shù)資料
型號(hào)： 514JBCXXXXXXBAG
廠商： SILICON LABORATORIES
元件分類： 時(shí)鐘產(chǎn)生/分配
英文描述： 125 MHz, OTHER CLOCK GENERATOR, PDSO6
封裝： 3.20 X 5 MM, ROHS COMPLIANT PACKAGE-6
文件頁(yè)數(shù)： 16/32頁(yè)
文件大?。?/td> 267K
代理商： 514JBCXXXXXXBAG
Si514
Preliminary Rev. 0.9
23
Figure 6. I2C Read Operation
The timing specifications and timing diagram for the I2C bus is compatible with the I2C-Bus standard. SDA timeout
is supported for compatibility with SMBus interfaces.
The I2C bus can be operated at a bus voltage of 1.71 to 3.63 V and is 3.3 V tolerant.
1 – Read
0 – Write
A – Acknowledge (SDA LOW)
N – Not Acknowledge (SDA HIGH)
S – START condition
P – STOP condition
From slave to master
From master to slave
Read Operation – Single Byte
S
0 A Reg Addr [7:0]
Slv Addr [6:0]
A P
Read Operation - Burst (Auto Address Increment)
Reg Addr +1
S
1 A
Slv Addr [6:0]
Data [7:0]
P
N
S
0 A Reg Addr [7:0]
Slv Addr [6:0]
A P
S
1 A
Slv Addr [6:0]
Data [7:0]
A
P
N
Data [7:0]
相關(guān)PDF資料
PDF描述
514JCBXXXXXXAAGR 170 MHz, OTHER CLOCK GENERATOR, PDSO6
514KAAXXXXXXAAG 250 MHz, OTHER CLOCK GENERATOR, PDSO6
514KAAXXXXXXBAG 250 MHz, OTHER CLOCK GENERATOR, PDSO6
514KABXXXXXXBAG 170 MHz, OTHER CLOCK GENERATOR, PDSO6
514KBAXXXXXXBAGR 250 MHz, OTHER CLOCK GENERATOR, PDSO6
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