參數(shù)資料
型號(hào)： 514PACXXXXXXBAG
廠商： SILICON LABORATORIES
元件分類： 時(shí)鐘產(chǎn)生/分配
英文描述： 125 MHz, OTHER CLOCK GENERATOR, PDSO6
封裝： 3.20 X 5 MM, ROHS COMPLIANT PACKAGE-6
文件頁數(shù)： 7/32頁
文件大?。?/td> 267K
代理商： 514PACXXXXXXBAG
Si514
Preliminary Rev. 0.9
15
3. All-Digital PLL Applications
The Si514 uses a high resolution divider M that enables fine frequency adjustments with resolution better than
0.026 parts per billion. Fine frequency adjustments are useful when making frequency corrections that compensate
for changing ambient conditions, long term aging or when locking the Si514 to an input clock reference. Figure 3
shows a typical implementation using a system IC such as an FPGA to control the output of the Si514 in a phase-
locked application. Refer to “AN575: An Introduction to FPGA-Based ADPLLs” for more information.
Figure 3. All-Digital PLL Application Using Si514 with Dual CMOS Output
Since small frequency changes must be within ±1000 ppm of the center frequency, HS_DIV and LS_DIV remain
constant. The below expression can be used to calculate a new M2 divider value based on a desired output
frequency shift, where FOUT is in ppm.
Some systems, particularly those that use feedback control, can simplify the computation by implementing an
approximate frequency change based on toggling a bit position or adding/subtracting a bit to the existing M_Frac
value. Since M ranges approximately ±10% between 65.04065041 and 78.17385866, the effect of changing
M_Frac by a single bit depends only slightly on the absolute value of M.
For M=71 near the midpoint of the range, toggling M_Frac[0] changes the output frequency by 0.026 ppb. Each
higher order bit doubles the influence such that toggling M_Frac[1] is 0.052 ppb, M_Frac[2] is 0.1 ppb, etc. Figure 4
shows this trend across multiple registers generalized to M_Frac[N]. Coarse changes greater than ±1.7 ppm are
possible but most applications require finer transitions. Toggling each bit involves incrementing or decrementing
the bit position. Writing M_Int[8:3] in register 9 completes the operation.
Figure 4. Output Frequency Change When Toggling M_Frac[N], M=71
I2C Control
Any Frequency
DSPLL
CLK_OUT
FB
Si514
FPGA
÷
I2C
Master
Command
Conversion
Loop
Filter
PD
÷
SCL
SDA
Fin
M2
M1 1 FOUT 10
6
–
–
=
M_Int[8:0] = 000100111
M = 71.000000000000
M_Frac[28:0] = 00000000000000000000000000000
M_Frac[23:16] = 00000000
M_Frac[15:8] = 00000000
M_Frac[7:0] = 00000000
0.026ppb
6.7ppb
1.7ppm
相關(guān)PDF資料
PDF描述
514PBAXXXXXXAAGR 250 MHz, OTHER CLOCK GENERATOR, PDSO6
514PBAXXXXXXAAG 250 MHz, OTHER CLOCK GENERATOR, PDSO6
514PBCXXXXXXAAGR 125 MHz, OTHER CLOCK GENERATOR, PDSO6
514PBCXXXXXXBAG 125 MHz, OTHER CLOCK GENERATOR, PDSO6
514PCAXXXXXXAAG 250 MHz, OTHER CLOCK GENERATOR, PDSO6
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
514PCC000148BAG 功能描述:標(biāo)準(zhǔn)時(shí)鐘振蕩器 PROGRMABLE XO 6 PIN 0.7PS RS JTR RoHS:否 制造商:AVX 產(chǎn)品:Standard Clock Oscillators 封裝 / 箱體:7 mm x 5 mm 頻率:75 MHz 頻率穩(wěn)定性:50 PPM 電源電壓:2.5 V 負(fù)載電容: 端接類型:SMD/SMT 最小工作溫度:0 C 最大工作溫度:+ 70 C 輸出格式:LVDS 尺寸: 封裝:Reel 系列:
514REF 制造商:HellermannTyton 功能描述:Label; Refill Self-Laminating Rite-On; 3/4 in.; 5/16 in.; 200 制造商:HellermannTyton 功能描述:Rite-On Marker Refill Self-Lam 3/4(W) X 5/16(L)
514RG 制造商:MENNEKES ELECTROTECHNIK 功能描述:400V16A4P6H CONN IP44
514S4P144 功能描述:電纜組件 MINI-MZR STR EXT RoHS:否 制造商:Molex 產(chǎn)品:Power Assemblies 類型:Cable Assembly 連接器端口 A:No Connector 連接器端口 A 管腳計(jì)數(shù):4 連接器端口 B:No Connector 連接器端口 B 管腳計(jì)數(shù): 型式:Male 線規(guī) - 美國線規(guī)（AWG）:20, 28 長度:0.305 m 顏色:Black, Red
514S4P36 功能描述:電纜組件 MINI-MZR STR EXT RoHS:否 制造商:Molex 產(chǎn)品:Power Assemblies 類型:Cable Assembly 連接器端口 A:No Connector 連接器端口 A 管腳計(jì)數(shù):4 連接器端口 B:No Connector 連接器端口 B 管腳計(jì)數(shù): 型式:Male 線規(guī) - 美國線規(guī)（AWG）:20, 28 長度:0.305 m 顏色:Black, Red
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