參數(shù)資料
型號: 5303B-CM
廠商: TERIDIAN SEMICONDUCTOR CORP
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, QCC48
封裝: QFN-48
文件頁數(shù): 15/16頁
文件大小: 231K
代理商: 5303B-CM
AVPro 5303B
Universal 3-Input A/V Switch Interface
DATA SHEET
Page: 8 of 16
2005 TERIDIAN Semiconductor Corporation
Rev 1.0
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Operation beyond the maximum ratings may damage the device
PARAMETER
RATING
Storage temperature
-55 to 150
°C
Junction operating temperature
+125
°C
5V supply voltage pins
-0.3 V < VCC < 6V
12V supply pin
-0.3 V < VDD < 13V
Voltage applied to Digital and Video Inputs
-0.3V to VCC+0.3 V
Voltage applied to video pins
-0.3V to VCC+0.3 V
Voltage applied to audio pins
-0.3 V < VDD < 13V
Voltage applied to FNC pin (input)
-0.3 V < VDD < 13V
SPECIFICATIONS: Unless otherwise specified: 0° < Ta < 70 °C; power supplies VCC = +5.0 V
±5%, VDD = 12.0 V
±5%.
Parameter
CONDITION
MIN
NOM
MAX
UNIT
Operating Characteristics
Power Supply Currents
(Default register setting)
All outputs not loaded
VCC (+5 VDC)
VDD (+12 VDC)
16.5
4
20
5
mA
Power Supply Currents
(Default register setting)
Pdwn = 1
VCC (+5 VDC)
VDD (+12 VDC)
2.3
10
3
100
mA
A
PSRR
fin = 100 Hz, 0.3 Vpp on VCC/ VDD
40
dB
Switch time
From serial data acknowledge
2.0
s
Wake time
From Power Down Condition
5
s
Serial Port Timing (Set by I2C controller)
SCLK Input Frequency
400
kHz
SCLK LOW time (tCL)
1.3
s
SCLK HIGH time (tCH)
0.6
s
Rise time (tRT)
SCLK and SDATA
300
ns
Fall time (tFT)
SCLK and SDATA
300
ns
Data set-up time* (tDSU)
SDATA change to SCLK HIGH
100
ns
Data hold time* (tDH)
SCLK LOW to SDATA change
30
ns
Start set-up time (tSSU)
0.6
s
Start hold time (tSH)
0.6
s
Stop set-up time (tPSU)
0.6
s
Glitch rejection
maximum pulse on SCLK and/or
SDATA
50
ns
* These specifications also apply to an acknowledge generated by the device.
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