參數(shù)資料
型號(hào): 5429FCT521DTP
廠商: Integrated Device Technology, Inc.
英文描述: MULTILEVEL PIPELINE REGISTERS
中文描述: 多級(jí)管道登記冊(cè)
文件頁(yè)數(shù): 5/7頁(yè)
文件大小: 93K
代理商: 5429FCT521DTP
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.2
5
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT520AT/521AT
FCT520BT/521BT
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPHL
tPLH
Propagation Delay
CLK to Yn
CL = 50pF
RL = 500
2.0
14.0
2.0
16.0
2.0
7.5
2.0
8.0
ns
tPHL
tPLH
Propagation Delay
S0 or S1 to Yn
2.0
13.0
2.0
15.0
2.0
7.5
2.0
8.0
ns
tSU
Set-up Time, HIGH or LOW
Dn to CLK
5.0
6.0
2.5
2.8
ns
tH
Hold Time, HIGH or LOW
Dn to CLK
2.0
2.0
2.0
2.0
ns
tSU
Set-up Time, HIGH or LOW
I0 or I1 to CLK
5.0
6.0
4.0
4.5
ns
tH
Hold Time, HIGH or LOW
I0 or I1 to CLK
2.0
2.0
2.0
2.0
ns
tPHZ
tPLZ
Output Disable Time
1.5
12.0
1.5
13.0
1.5
7.0
1.5
7.5
ns
tPZH
tPZL
Output Enable Time
1.5
15.0
1.5
16.0
1.5
7.5
1.5
8.0
ns
tW
Clock Pulse Width
HIGH or LOW
7.0
8.0
5.5
6.0
ns
NOTES:
2619 tbl 08
1. See test circuit and waveforms.
2. Minimum units are guaranteed but not tested on Propagation Delays.
2619 tbl 07
FCT520CT/521CT
FCT520DT/521DT
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPHL
tPLH
Propagation Delay
CLK to Yn
CL = 50pF
RL = 500
2.0
6.0
2.0
7.0
2.0
5.2
ns
tPHL
tPLH
Propagation Delay
S0 or S1 to Yn
2.0
6.0
2.0
7.0
2.0
4.8
ns
tSU
Set-up Time, HIGH or LOW
Dn to CLK
2.5
2.8
1.5
ns
tH
Hold Time, HIGH or LOW
Dn to CLK
2.0
2.0
1.0
ns
tSU
Set-up Time, HIGH or LOW
I0 or I1 to CLK
4.0
4.5
2.0
ns
tH
Hold Time, HIGH or LOW
I0 or I1 to CLK
2.0
2.0
1.0
ns
tPHZ
tPLZ
Output Disable Time
1.5
6.0
1.5
6.0
1.5
4.8
ns
tPZH
tPZL
Output Enable Time
1.5
6.0
1.5
7.0
1.5
4.0
ns
tW
Clock Pulse Width
HIGH or LOW(3)
5.5
6.0
3.0
ns
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