- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67319 > 5504-CGT AUDIO SINGLE CHIP RECEIVER, PQFP48 PDF資料下載
參數(shù)資料
| 型號(hào)： | 5504-CGT |
| 元件分類： | 接收器 |
| 英文描述： | AUDIO SINGLE CHIP RECEIVER, PQFP48 |
| 封裝： | TQFP-48 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 80K |
| 代理商： | 5504-CGT |
5504 DCR
Direct Conversion Receiver
6
DESCRIPTION OF INTERNAL REGISTERS
Register 0
VCO divide ratio, bits 14 through 8, msb always set to 0
Register 1
VCO divide ratio, bits 7 through 0
Register 2
msb not used. Always set to 1
VCO divide ratio, bits 16 and 15
R3, R2, R1, R0 Reference division ratio, as shown in following table:
R3 R2 R1 R0
Reference
division ratio
0 0 0 0
2
0 0 0 1
4
0 0 1 0
8
0 0 1 1
16
0 1 0 0
32
0 1 0 1
64
0 1 1 0
128
0 1 1 1
256
1 0 0 0
Undefined
1 0 0 1
5
1 0 1 0
10
1 0 1 1
20
1 1 0 0
40
1 1 0 1
80
1 1 1 0
160
1 1 1 1
320
Register 3
C1, C0
Phase detector current control, as shown in following table:
ipump word
C1 C0
Phase Detector
charge current
A
0 0
100
0 1
200
1 0
300
1 1
400
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 5560/BEA | 0.04 A SWITCHING CONTROLLER, 100 kHz SWITCHING FREQ-MAX, CDIP16 |
| 5560/BEA | 0.04 A SWITCHING CONTROLLER, 100 kHz SWITCHING FREQ-MAX, CDIP16 |
| 5610-CG | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 567/BCA | PHASE LOCKED LOOP, 0.5 MHz, CDIP14 |
| 567/BCA | PHASE LOCKED LOOP, 0.5 MHz, CDIP14 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5504DCR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Direct Conversion Receiver |
| 5504F1-09P-01-03 | 制造商:SPC Multicomp 功能描述:PLUG D PCB R/A 9 WAY BL |
| 5504F1-09P-01-03-F1 | 制造商:SPC Multicomp 功能描述:PLUG D PCB R/A 9WAY |
| 5504F1-09P-02-03 | 制造商:SPC Multicomp 功能描述:PLUG D PCB R/A 9 WAY |
| 5504F1-09P-02-03-F1 | 制造商:SPC Multicomp 功能描述:CONNECTOR D-SUB PLUG THT R/A 9WAY 制造商:SPC Multicomp 功能描述:PLUG, D, PCB, R/A, 9WAY 制造商:PRIVATE LABEL 功能描述:CONNECTOR, D-SUB, PLUG, THT, R/A, 9WAY, Product Range:MULTICOMP - Dsub Formed Pi |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。