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參數(shù)資料
| 型號： | 570ABA000196DG |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 10 MHz - 1417.5 MHz, LVPECL OUTPUT |
| 封裝： | ROHS COMPLIANT PACKAGE-8 |
| 文件頁數(shù)： | 29/30頁 |
| 文件大小： | 361K |
| 代理商： | 570ABA000196DG |
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Si570/Si571
8
Rev. 1.1
Table 6. CLK± Output Phase Jitter (Si571)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Phase Jitter (RMS)1,2,3
for FOUT > 500 MHz
φ
J
Kv = 33 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.26
—
ps
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.27
0.26
—
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.32
0.26
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.40
0.27
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.49
0.28
—
Kv = 356 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.87
0.33
—
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
4. Single ended mode: CMOS. Refer to the following application notes for further information:
“AN255: Replacing 622 MHz VCSO Device with the Si55x VCXO”
“AN256: Integrated Phase Noise”
“AN266: VCXO Tuning Slope (Kv), Stability, and Absolute Pull Range (APR)”
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| 570ABA000313DG | 功能描述:可編程振蕩器 PROGRMABLE XO 8 PIN 0.3PS RS JTR RoHS:否 制造商:IDT 封裝 / 箱體:5 mm x 7 mm x 1.5 mm 頻率:15.476 MHz to 866.67, 975 MHz to 1300 MHz 頻率穩(wěn)定性:+/- 50 PPM 電源電壓:3.63 V 負載電容:10 pF 端接類型:SMD/SMT 輸出格式:LVPECL 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 尺寸:7 mm W x 5 mm L x 1.5 mm H 封裝: |
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