- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄34471 > 571AKAFREQDG (SILICON LABORATORIES) VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT PDF資料下載
參數(shù)資料
| 型號： | 571AKAFREQDG |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | VCXO, clock |
| 英文描述： | VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT |
| 封裝： | ROHS COMPLIANT PACKAGE-8 |
| 文件頁數(shù)： | 26/26頁 |
| 文件大?。?/td> | 315K |
| 代理商： | 571AKAFREQDG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁
Si570/Si571
Rev. 0.31
9
Phase Jitter (RMS)1,2,3
for FOUT of 125 to 500 MHz
φ
J
Kv = 33 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.37
0.33
—
ps
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.37
0.33
—
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.43
0.34
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.50
0.34
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.59
0.35
—
Kv = 356 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
1.00
0.39
—
Table 7. CLK± Output Period Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Period Jitter*
JPER
RMS
—
2
—
ps
Peak-to-Peak
—
14
—
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to “AN279: Estimating Period Jitter
from Phase Noise” for further information.
Table 6. CLK± Output Phase Jitter (Si571) (Continued)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 571DJAFREQDG | VCXO, CLOCK, 10 MHz - 945 MHz, CMOS OUTPUT |
| 571NGAFREQDG | VCXO, CLOCK, 10 MHz - 945 MHz, LVDS OUTPUT |
| 571NMAFREQDG | VCXO, CLOCK, 10 MHz - 945 MHz, LVDS OUTPUT |
| 571QJAFREQDGR | VCXO, CLOCK, 10 MHz - 945 MHz, CMOS OUTPUT |
| 571WAAFREQDG | VCXO, CLOCK, 10 MHz - 945 MHz, CMOS OUTPUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 571AMA000107DG | 功能描述:VCXO振蕩器 PRGRMBL VCXO 8 PIN 7mm x 5mm RoHS:否 制造商:Fox 封裝 / 箱體:5 mm x 3.2 mm 頻率:19.2 Mhz 頻率穩(wěn)定性:2.5 PPM 輸出格式: 封裝:Reel 電源電壓:3 V 端接類型:SMD/SMT 尺寸:3.2 mm W x 5 mm L x 1.5 mm H 最小工作溫度:- 20 C 最大工作溫度:+ 75 C |
| 571AMA000107DGR | 制造商:Silicon Laboratories Inc 功能描述:CONTROLLED OSCILLATOR 10MHZ VCXO LVPECL 6-PIN SMD - Tape and Reel |
| 571AMA000112DG | 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 10MHZ VCXO LVPECL 8SMD - Trays |
| 571AMA000121DG | 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays |
| 571AMA000162DG | 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 44MHZ VCXO LVPECL 8SMD - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。