參數(shù)資料
型號(hào): 5962-88764043A
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 8-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, CQCC28
封裝: CERAMIC, LCC-28
文件頁(yè)數(shù): 12/14頁(yè)
文件大?。?/td> 366K
代理商: 5962-88764043A
AD7824/AD7828
REV. D
–7–
INPUT CURRENT
Due to the novel conversion techniques employed by the AD7824/
AD7828, the analog input behaves somewhat differently than in
conventional devices. The ADC’s sampled-data comparators
take varying amounts of input current depending on which cycle
the conversion is in.
The equivalent input circuit of the AD7824/AD7828 is shown
in Figure 8. When a conversion starts (
CS and RD going low),
all input switches close, and the selected input channel is con-
nected to the most significant and least significant comparators.
Therefore, the analog input is connected to thirty-one 1 pF
input capacitors at the same time.
Figure 8. AD7824/AD7828 Equivalent Input Circuit
The input capacitors must charge to the input voltage through
the on resistance of the analog switches (about 3 k
to 6 k). In
addition, about 14 pF of input stray capacitance must be charged.
The analog input for any channel can be modelled as an RC
network as shown in Figure 9. As RS increases, it takes longer
for the input capacitance to charge.
Figure 9. RC Network Model
The time for which the input comparators track the analog input
is approximately 1
s at the start of conversion. Because of input
transients on the analog inputs, it is recommended that a source
impedance of not greater than 100 ohms be connected to the
analog inputs. The output impedance of an op amp is equal to
the open loop output impedance divided by the loop gain at the
frequency of interest. It is important that the amplifier driving
the AD7824/AD7828 analog inputs have sufficient loop gain at the
input signal frequency as to make the output impedance low.
Suitable op amps for driving the AD7824/AD7828 are the
AD544 or AD644.
INHERENT SAMPLE-HOLD
A major benefit of the AD7824’s and AD7828’s analog input
structure is its ability to measure a variety of high-speed signals
without the help of an external sample-and-hold. In a conven-
tional SAR type converter, regardless of its speed, the input
must remain stable to at least 1/2 LSB throughout the conver-
sion process if rated accuracy is to be maintained. Consequently,
for many high-speed signals, this signal must be externally
sampled and held stationary during the conversion. The
AD7824/AD7828 input comparators, by nature of their
input switching inherently accomplish this sample-and-hold
function. Although the conversion time for AD7824/AD7828
is 2
s, the time for which any selected analog input must be
1/2 LSB stable is much smaller. The AD7824/AD7828 tracks
the selected input channel for approximately 1
s after conver-
sion start. The value of the analog input at that instant (1
s from
conversion start) is the measured value. This value is then used
in the least significant flash to generate the lower 4-bits of data.
SINUSOIDAL INPUTS
The AD7824/AD7828 can measure input signals with slew rates
as high as 157 mV/
s to the rated specifications. This means that
the analog input frequency can be up to 10 kHz without the aid
of an external sample and hold. Furthermore, the AD7828 can
measure eight 10 kHz signals without a sample and hold. The
Nyquist criterion requires that the sampling rate be twice the
input frequency (i.e., 2
× 10 kHz). This requires an ideal anti-
aliasing filter with an infinite roll-off. To ease the problem of
antialiasing filter design, the sampling rate is usually much greater
than the Nyquist criterion. The maximum sampling rate (FMAX)
for the AD7824/AD7828 can be calculated as follows:
FMAX =
1
tCRD
+t
P
FMAX =
1
2E – 6
+0.5E – 6
= 400 kHz
tCRD = AD7824/AD7828 Conversion Time
tP = Minimum Delay Between Conversion
This permits a maximum sampling rate of 50 kHz for each of
the 8 channels when using the AD7828 and 100 kHz for each of
the 4 channels when using the AD7824.
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