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參數(shù)資料
| 型號(hào)： | 5962-88770032C |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | MOSFETs |
| 英文描述： | 6 A BUF OR INV BASED MOSFET DRIVER, CQCC20 |
| 封裝： | CERAMIC, QCC-20 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 1328K |
| 代理商： | 5962-88770032C |
D
S
32
31
M
±
5ppm、I2C實(shí)時(shí)時(shí)鐘
4
AC_ELECTRICAL_CHARACTERISTICS—I2C_INTERFACE
(VCC or VBAT = +2.3V to +5.5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.3V, VBAT = +3.0V,
and TA = +25NC, unless otherwise noted.) (Note 5, Figure 1)
Note_1:_All voltages are referenced to ground.
Note_2:_The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set.
Note_3: Includes the temperature conversion current (averaged).
Note_4: This delay applies only if the oscillator is enabled. If the EOSC bit is 1, tREC is bypassed and RST immediately goes high.
The state of RST does not affect the I2C interface or RTC functions.
Note_5:__Interface timing shown is for fast-mode (400kHz) operation. This device is also backward-compatible with standard mode
I2C timing.
Note_6:_CB: Total capacitance of one bus line in picofarads.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SCL Clock Frequency
fSCL
0
400
kHz
Bus Free Time Between STOP
and START Conditions
tBUF
1.3
F
s
Hold Time (Repeated) START
Condition
tHD:STA
0.6
F
s
Low Period of SCL
tLOW
1.3
F
s
High Period of SCL
tHIGH
0.6
F
s
Data Hold Time
tHD:DAT
0
0.9
F
s
Data Set-Up Time
tSU:DAT
100
ns
START Set-Up Time
tSU:STA
0.6
F
s
SDA and SCL Rise Time
tR
(Note 6)
20 +
0.1CB
300
ns
SDA and SCL Fall Time
tF
(Note 6)
20 +
0.1CB
300
ns
STOP Set-Up Time
tSU:STO
0.6
F
s
SDA, SCL Input Capacitance
CBIN
10
pF
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