參數(shù)資料
型號: 5962-89932012A
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: PARALLEL, 8 BITS INPUT LOADING, 0.085 us SETTLING TIME, 8-BIT DAC, CQCC20
封裝: CERAMIC, LCC-20
文件頁數(shù): 3/26頁
文件大?。?/td> 650K
代理商: 5962-89932012A
DAC08
Rev. C | Page 11 of 20
BASIC CONNECTIONS
00268-C-024
+VREF
RREF
IIN
RIN
VIN
14
15
R15
(OPTIONAL)
HIGH INPUT
IMPEDANCE
+VREF MUST BE ABOVE PEAK POSITIVE SWING OF VIN
RREF ≈ R15
IREF ≥ PEAK NEGATIVE SWING OF IIN
IREF
RREF
VIN
+VREF
14
15
14
15
Figure 23. Accommodating Bipolar References
00268-C-025
R15
IREF
FOR FIXED REFERENCE,
TTL OPERATION,
TYPICAL VALUES ARE:
VREF = 10.000V
RREF = 5.000k
R15 = RREF
CC = 0.01F
VLC = 0V (GROUND)
MSB
B1 B2 B3 B4 B5 B6 B7
LSB
B8
V–
CC
COMP
0.1
F
V–
V+
VLC
IO
V+
VREF (+)
+VREF
RREF
(R14)
VREF (–)
14
15
4
2
56 78 9 10 11 12
316
13
1
IO
0.1
F
IFR =
×
IO + IO = IFR FOR
ALL LOGIC STATES
+VREF
RREF
255
256
Figure 24. Basic Positive Reference Operation
00268-C-026
IREF = 2.000mA
MSB
B1 B2 B3 B4 B5 B6 B7
LSB
B8
5.000k
EO
5.000k
4
2
IO
14
FULL RANGE
HALF SCALE +LSB
HALF SCALE
HALF SCALE –LSB
ZERO SCALE +LSB
ZERO SCALE
B1
1
0
B2
1
0
1
0
B3
1
0
1
0
B4
1
0
1
0
B5
1
0
B6
1
0
1
0
B7
1
0
1
0
B8
1
0
1
0
IO
1.992
1.008
1.000
0.992
0.008
0.000
IO
0.000
0.984
0.992
1.000
1.984
1.992
EO
–9.960
–5.040
–5.000
–4.960
–0.040
0.000
EO
–0.000
–4.920
–4.960
–5.000
–9.920
–9.960
Figure 25. Basic Unipolar Negative Operation
00268-C-027
IREF = 2.000mA
MSB
B1 B2 B3 B4 B5 B6 B7
LSB
B8
10V
10k
10k
EO
4
2
IO
14
POS. FULL RANGE
POS. FULL RANGE –LSB
ZERO SCALE +LSB
ZERO SCALE
ZERO SCALE –LSB
NEG. FULL SCALE +LSB
NEG. FULL SCALE
B1
1
0
B2
1
0
1
0
B3
1
0
1
0
B4
1
0
1
0
B5
1
0
1
0
B6
1
0
1
0
B7
1
0
1
0
B8
1
0
1
0
1
0
EO
–9.920
–9.840
–0.080
0.000
+0.080
+9.920
+10.000
EO
+10.000
+9.920
+0.160
+0.080
0.000
–9.840
–9.920
Figure 26. Basic Bipolar Output Operation
00268-C-028
APPROX
5k
≈1V
IREF (+) ≈ 2mA
39k
10k
POT
LOW T.C.
4.5k
VREF
10V
14
15
Figure 27. Recommended Full-Scale Adjustment Circuit
00268-C-029
RREF
IO
R15
–VREF
IFS
–VREF
RREF
NOTE
RREF SETS IFS; R15 IS FOR
BIAS CURRENT CANCELLATION.
14
15
4
2
Figure 28. Basic Negative Reference Operation
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