參數(shù)資料
型號: 5962-9073701MPX
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 多路復(fù)用及模擬開關(guān)
英文描述: 1-CHANNEL, SGL POLE SGL THROW SWITCH, CDIP8
封裝: CERAMIC, DIP-8
文件頁數(shù): 7/14頁
文件大?。?/td> 1884K
代理商: 5962-9073701MPX
2
Maxim Integrated
Dual 36V Op Amp for 18-Bit
SAR ADC Front-End
MAX9633
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Supply Voltage (VCC to VEE).................................-0.3V to +40V
All Other Pins..................................(VEE - 0.3V) to (VCC + 0.3V)
Short-Circuit Duration of OUTA, OUTB................................. 10s
Continuous Input Current (any pins)............................... ±20mA
Continuous Power Dissipation (TA = +70NC)
SO (derate 24.4mW/NC above +70NC)
Multilayer Board .....................................................1951.2mW
TDFN (derate 24.4mW/NC above +70NC)
Multilayer Board ........................................................1905mW
Operating Temperature Range........................ -40NC to +125NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Soldering Temperature (reflow) ......................................+260NC
ELECTRICAL CHARACTERISTICS
(VCC = +15V, VEE = -15V, VCM = 0V, RL = 10kI to VGND = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25NC.) (Note 2)
ABSOLUTE MAXIMUM RATINGS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-lay-
er board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
SO-EP
Junction-to-Ambient Thermal Resistance (
qJA) ..........41°C/W
Junction-to-Case Thermal Resistance (
qJC) .................7°C/W
TDFN-EP
Junction-to-Ambient Thermal Resistance (
qJA) ..........42°C/W
Junction-to-Case Thermal Resistance (
qJC) .................8°C/W
PACKAGE THERMAL CHARACTERISTICS (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY
Supply Voltage Rang
e
VCC - VEE Guaranteed by PSRR
4.5
36
V
Supply Current
ICC
Per amplifier
TA = +25NC
3.5
5
mA
-40NC P TA P +85NC
6
-40NC P TA P +125NC
6.5
Power-Supply Rejection Ratio
PSRR
+4.5V P (VCC - VEE)
P
+36V
TA = +25NC
112
135
dB
-40NC P TA P +125NC
110
DC SPECIFICATIONS
Input Offset Voltage
VOS
TA = +25NC
Q
70
Q
200
F
V
-40NC P TA P +125NC
Q
290
Input Offset Voltage Drift
(Note 3)
D
VOS
-40NC P TA P +125NC
0.2
0.9
F
V/NC
Input Bias Current
IB
(VEE + 0.45V) P VCM P (VCC - 1.8V)
Q
42
Q
400
nA
VEE P VCM P (VCC - 1.8V)
4.5
22
F
A
Input Offset Current
IOS
(VEE + 0.45V) P VCM P (VCC - 1.8V)
Q
30
Q
300
nA
VEE P VCM P (VCC - 1.8V)
Q
200
Q
2000
Input Voltage Range
VIN+, VIN- Guaranteed by CMRR
TA = +25NC
VEE
VCC -
1.7
V
-40NC P TA P
+125NC
VEE
VCC -
1.8
Common-Mode Rejection Ratio
CMRR
VEE P VCM P (VCC - 1.7V), TA = +25NC
106
130
dB
VEE P VCM P (VCC - 1.8V), -40NC P TA P
+125NC
105
130
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