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參數(shù)資料
| 型號： | 5962-9095501M2X |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬運算功能 |
| 英文描述： | LOG OR ANTILOG AMPLIFIER, 145 MHz BAND WIDTH, CQCC20 |
| 封裝： | CERAMIC, LCC-20 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 234K |
| 代理商： | 5962-9095501M2X |
AD640
REV. C
–4–
CHIP DIMENSIONS AND
BONDING DIAGRAM
Dimensions shown in inches and (mm).
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±7.5 V
Input Voltage (Pin 1 or Pin 20 to COM) . . . . –3 V to +300 mV
Attenuator Input Voltage (Pin 5 to Pin 3/4) . . . . . . . . . . .
±4 V
Storage Temperature Range D, E . . . . . . . . . –65
°C to +150°C
Storage Temperature Range N, P . . . . . . . . . –65
°C to +125°C
Ambient Temperature Range, Rated Performance
Industrial, AD640B . . . . . . . . . . . . . . . . . . . –40
°C to +85°C
Military, AD640T . . . . . . . . . . . . . . . . . . . –55
°C to +125°C
Commercial, AD640J . . . . . . . . . . . . . . . . . . . 0
°C to +70°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Package
Model
Range
Description
Option
AD640JN
0
°C to +70°C
20-Lead Plastic DIP
N-20
AD640JP
0
°C to +70°C
20-Lead PLCC
P-20A
AD640BD
–40
°C to +85°C
20-Lead Ceramic DIP
D-20
AD640BE
–40
°C to +85°C
20-Terminal Ceramic
LCC
E-20A
AD640BP
–40
°C to +85°C 20-Lead PLCC
P-20A
AD640TD/883B
–55
°C to +125°C 20-Lead Ceramic DIP
D-20
5962-9095501MRA –55
°C to +125°C 20-Lead Ceramic DIP
D-20
AD640TE/883B
–55
°C to +125°C 20-Terminal Ceramic
LCC
E-20A
5962-9095501M2A –55
°C to +125°C 20-Terminal Ceramic
LCC
E-20A
AD640TCHIPS
–55
°C to +125°CDie
AD640EB
Evaluation Board
AD640JP-REEL
0
°C to +70°C
13" Tape and Reel
P-20A
AD640JP-REEL7
0
°C to +70°C
7" Tape and Reel
P-20A
CONNECTION DIAGRAMS
20-Lead Ceramic DIP (D) Package
20-Lead PLCC (P) Package
20-Terminal Ceramic LCC (E) Package
20-Lead Plastic DIP (N) Package
9
10
11
12
13
3
2
1
20
19
18
17
16
15
14
4
5
6
7
8
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
AD640
ATN COM
CKT COM
ATN
COM
ATN
LO
BL2
SIG
–IN
SIG
+IN
ATN
OUT
RG1
RG0
RG2
LOG OUT
SIG
–OUT
SIG
+OUT
+V
S
LOG
COM
ATN IN
BL1
–VS
ITC
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
AD640
SIG –OUT
BL2
ITC
ATN LO
ATN COM
–VS
BL1
ATN IN
SIG –IN
SIG +IN
ATN OUT
CKT COM
RG1
RG0
RG2
LOG OUT
LOG COM
+VS
SIG +OUT
20 19
1
2
3
18
14
15
16
17
4
5
6
7
8
9
1011 1213
TOP VIEW
(Not to Scale)
AD640
ATN COM
CKT COM
ATN
COM
ATN
LO
BL2
SIG
–IN
SIG
+IN
ATN
OUT
RG1
RG0
RG2
LOG OUT
SIG
–OUT
SIG
+OUT
+V
S
LOG
COM
ATN IN
BL1
–VS
ITC
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD640 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
(continued from page 1)
6. The low input offset voltage of 50
V (200 V max) ensures
good accuracy for low level dc inputs.
7. Thermal recovery “tails,” which can obscure the response
when a small signal immediately follows a high level input,
have been minimized by special attention to design details.
8. The noise spectral density of 2 nV/
√Hz results in a noise floor of
~23
V rms (–80 dBm) at a bandwidth of 100 MHz. The dy-
namic range using cascaded AD640s can be extended to 95 dB
by the inclusion of a simple filter between the two devices.
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