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參數(shù)資料
| 型號： | 5962-9451701MCA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, CDIP14 |
| 封裝： | CERAMIC, DIP-14 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 281K |
| 代理商： | 5962-9451701MCA |
Theory of Operation
The CLC522 is a linear wideband variable-gain amplifier
as illustrated in Fig 1. A voltage input signal may be
applied differentially between the two inputs (+Vin, -Vin),
or single-endedly by grounding one of the unused inputs.
The CLC522 input buffers convert the input voltage to a
current (IRg) that is a function of the differential input
voltage (Vinput =+Vin - -Vin) and the value of the gain-
setting resistor (Rg). This current (IRg) is then mirrored to
a gain stage with a current gain of 1.85. The voltage-
controlled two-quadrant multiplier attenuates this current
which is then converted to a voltage via the output
amplifier. This output amplifier is a current-feedback op
amp configured as a transimpedance amplifier. It's tran-
simpedance gain is the feedback resistor (Rf). The input
signal, output, and gain control are all voltages. The
output voltage can easily be calculated as seen in Eq. 1.
Eq. 1
Fig. 1
Phase
Negative Sync
Phase
Positive Sync
Gain
Positive Sync
Gain
Negative Sync
4.43 MHz
Avmax = +10
Vg = 1.0V
Num ber of 150
Loads
Di
ff
er
enti
al
G
a
in
(%
)
Di
ffer
enti
al
Phase
(degr
e
es)
Differential Gain and Phase
1234
.25
.20
.15
.10
.05
0
.25
.20
.15
.10
.05
0
50MHz
20MHz
10MHz
5MHz
-4
-2
02
4
6
8
10
Output Power (Pout, dBm)
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
D
istortion
L
e
vel
(
d
Bc)
2nd Harmonic Distortion vs. Pout
1.1V
50
Po
1k
50
50
50
20
182
Rf
Vg
522
50MHz
20MHz
10MHz
5MHz
-4
-2
0
2
4
6
8
10
Output Power (Pout, dBm)
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
D
istortion
L
e
vel
(
d
Bc)
3rd Harmonic Distortion vs. Pout
1.1V
50
50
1k
50
50
20
182
Rf
Vg
522
Po
Input
Limited
Rf = 900
Output
Limited
Rf = 1.4k
0
100
Frequency (MHz)
20
19
18
17
16
15
14
13
12
11
10
-1
d
B
C
o
mp
re
ssio
n(d
B
m
)
-1dB Compression at Maximum Gain
Po
Pi
Rg
Rf
50
50
50
20
50
522
CLC522 Typical Performance (TA=+25°C, Vcc=±5V, Av=+10, Vg=1.1V, RL=100; unless noted)
Phase, Vg = 0.0V
Phase, Vg = 1.0V
Gain, Vg = 0.0V
Gain, Vg = 1.0V
4.43 MHz
Positive Sync
Avmax = +2
Number of 150
Loads
Di
ff
er
enti
al
G
a
in
(%
)
Dif
ferent
ialP
hase
(degrees)
Differential Gain and Phase
1234
.10
.08
.06
.04
.02
0
.10
.08
.06
.04
.02
0
10
20
3040
50
6070
80
90 100
Maximum Gain Setting, AVmax (V/V)
100
10
1
Vo
lt
a
g
eN
o
is
e(
n
V
/√
Hz
)
Input Referred Voltage Noise vs AVmax
VI
V
R
out
R
g
f
g
=
+
185
1
2
.
sin
.
ce I
V
R
A
R
V
R
input
g
v
f
g
=
+
185
1
2
Eq. 2
The gain of the CLC522 is therefore a function of three
external variables; Rg, Rf and Vg as expressed in Eq. 2.
The gain-control voltage (Vg) has a ideal input range of
-1V
≤Vg≤+1V. At Vg=+1V, the gain of the CLC522 is at
its maximum as expressed in Eq. 3.
A
R
V
f
g
max
.
= 185
Eq. 3
Notice also that Eq. 3 holds for both differential and
single-ended operation.
Choosing Rf and Rg
Rg is calculated from Eq.4. V
inputmax
is the maximum peak
R
V
I
g
input
Rg
=
max
Eq. 4
input voltage (Vpk) determined by the application. IRg
max
is the maximum allowable current through Rg and is
typically 1.8mA. Once AVmax is determined from the
minimum input and desired output voltages, Rf is then
determined using Eq. 5. These values of Rf and Rg are
RR
A
fg
V
=
1
185
.
max
Eq. 5
the minimum possible values that meet the input voltage
and maximum gain constraints. Scaling the resistor
values will decrease bandwidth and improve stability.
Application Discussion
http://www.national.com
4
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