REV. D
OP497
–3–
ORDERING GUIDE
Temperature
Package
Model
Range
Description
Option
OP497AY
* –55
°C to +125°C 14-Lead Cerdip
Q-14
OP497CY
* –55
°C to +125°C 14-Lead Cerdip
Q-14
OP497FP
–40
°C to +85°C
14-Lead Plastic DIP N-14
OP497FS
–40
°C to +85°C
16-Lead SOIC
R-16
OP497GP
–40
°C to +85°C
14-Lead Plastic DIP N-14
OP497GS
–40
°C to +85°C
16-Lead SOIC
R-16
*Not for new design; obsolete April 2002.
For a military processed devices, please refer to the Standard
Microcircuit Drawing (SMD) available at www.dscc.dla.mil/
programs.milspec./default.asp.
SMD Part Number
ADI Part Number
5962–9452101M2A
*
OP497BRC
5962–9452101MCA
OP497BY
*Not for new designs; obsolete April 2002.
DICE CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±20 V
Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20 V
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
40 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
Y Package . . . . . . . . . . . . . . . . . . . . . . . . –65
°C to +175°C
P, S Package . . . . . . . . . . . . . . . . . . . . . . . –65
°C to +150°C
Operating Temperature Range
OP497A, C (Y) . . . . . . . . . . . . . . . . . . . . –55
°C to +125°C
OP497F, G (Y) . . . . . . . . . . . . . . . . . . . . . –40
°C to +85°C
OP497F, G (P, S) . . . . . . . . . . . . . . . . . . . –40
°C to +85°C
Junction Temperature
Y Package . . . . . . . . . . . . . . . . . . . . . . . . –65
°C to +175°C
P, S Package . . . . . . . . . . . . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . 300
°C
Package Type
JA
3
JC
Unit
14-Pin Cerdip (Y)
94
10
°C/W
14-Pin Plastic DIP (P)
76
33
°C/W
16-Pin SOIC (S)
92
23
°C/W
NOTES
1Absolute Maximum Ratings apply to both DICE and packaged parts, unless
otherwise noted.
2For supply voltages less than
± 20 V, the absolute maximum input voltage is
equal to the supply voltage.
3HIA is specified for worst-case mounting conditions, i.e.,
JA is specified for
device in socket for cerdip, P-DIP packages; JA is specified for device soldered
to printed circuit board for SOIC package.
1/4
OP497
V2
2k
V1 20V p–p @ 10Hz
CHANNEL SEPARATION = 20 log
V /10000
2
V1
()
–
+
50
50k
–
+
1/4
OP497
Channel Separation Test Circuit
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP497 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE