參數(shù)資料
型號(hào)： 5962-9472501MCA
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 運(yùn)算放大器
英文描述： DUAL OP-AMP, 6000 uV OFFSET-MAX, 92 MHz BAND WIDTH, CDIP14
封裝： CERDIP-14
文件頁(yè)數(shù)： 3/27頁(yè)
文件大?。?/td> 685K
代理商： 5962-9472501MCA
Application Division (Continued)
by the input resistor R
g must be included in the output offset
calculation as a part of the non-inverting gain equation.
Application note OA-7 gives several circuits for DC offset
correction.
Layout Considerations
It is recommended that the decoupling capacitors (0.1F
ceramic and 6.8F electrolytic) should be placed as close as
possible to the power supply pins to insure a proper
high-frequency low impedance bypass. Careful attention to
circuit board layout is also necessary for best performance.
Of particular importance is the control of parasitic capaci-
tances (to ground) at the output and inverting input pins. See
CLC431/CLC432 Evaluation Board literature for more infor-
mation.
Applications Circuit
2:1 Video Mux (CLC431)
Figure 3 illustrates the connections necessary to configure
the CLC431 as a 2:1 multiplexer in a 75
. Each of the two
CLC431’s amplifiers is configured with a non-inverting gain
of +2V/V using 634
feedback (R
f) and gain-setting (Rg)
resistors . The feedback resistor value is lower than that
recommended in order to compensate for the reduction of
loop-gain that results from the inclusion of the 50
resistor
(R
j) in the feedback loop. The 50 resistor serves to insolate
the output of the active channel from the impedance of
inactive channel yet does not affect the low output imped-
ance channel. Notice that for proper operation V
RTTL 1(pin
13) is grounded and V
RTTL2 (pin 9) is unconnected. The pins
associated with the disable feature are to be connected as
follows: DIS1 and DIS2 (pins 3 & 10) are connected together
as well as DIS2 and DIS1 (pins 5 & 12). Channel 1 is
selected with the application of a logic “l(fā)ow” to SELECT
while a logic “high” selects Channel 2.
The optional 1k
pull-down resistor connected from the
output of the 2:1 mux to the negative power supply (V
CC)
results in improved differential gain and phase performance
(0.02% and 0.01) at PAL video levels.
Switched Gain Amplifier (CLC431)
As seen from the front page, the CLC431 can also be
configured as a switched-gain amplifier that is similar to the
2:1 mux. Configuring each of the two CLC431’s amplifiers
with different non-inverting gains and tying the two inputs
together (eliminating one of the input-terminating resistors)
allows the CLC431 to switch an input signal between two
different gains.
Inactive Channel Impedances (CLC431)
The impedance that is seen when looking into the output of
a disabled CLC431 is typically represented as 1M
\16pF.
The inverting input impedance becomes very high, essen-
tially open. Therefore, the impedance presented by a dis-
abled channel is (R
f+Rg)\ (Rj + (1M\16pF)) as illustrated in
Figure 4. Its should also be noted that any trace capacitance
that is associated with the common output connection will
add in parallel to that presented by the CLC431’s inactive
channel.
Rf
Channel 1
Channel 2
Rf
Ri
Rs
RL
Rg
Vout
SELECT
50
50
75
1k
Optional
-15V
75
75
75
12
13
3
NC
634
634
634
634
CLC431
5
10
9
DS012712-30
FIGURE 3.
CLC431/432
www.national.com
11
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