參數(shù)資料
型號: 5962-9853801QRA
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20
封裝: CERAMIC, DIP-20
文件頁數(shù): 15/37頁
文件大?。?/td> 693K
代理商: 5962-9853801QRA
TLV1544C, TLV1544I, TLV1548C, TLV1548I, TLV1548M
LOW-VOLTAGE 10-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 4/8 ANALOG INPUTS
SLAS139C – DECEMBER 1996 – REVISED JANUARY 1999
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after CS
↓ before responding to control input
signals. No attempt should be made to clock in input data until the minimum CS setup time elapses.
I/O CLK
DI
DO
EOC
CS
(see
Note A)
FS
1
2
3
45
6
7
8
9
10
Sample
MSB
LSB
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Hi-Z
A3
A2
A1
A0
Address Sampled
Conversion Starts on 10th I/O CLK
(6 I/O CLKs)
Access
11
12
13
14
15
16
Hold/Conversion
CS Rise After 16th I/O CLK
Initialize Counter
0s
td(EOC
↑-CS↓)
Initialize State Machine
7 I/O CLKs
Maximum
Figure 19. DSP Interface Timing (16-Clock Transfer, Normal Sample Mode, INV CLK = Low)
相關(guān)PDF資料
PDF描述
5962-9853801Q2A 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CQCC20
TLV1548CDB 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV1548IDB 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV1548CDBLE 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV1548CDBR 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
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