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| 型號(hào)： | 5962-9864601QEX |
| 廠商： | ANALOG DEVICES INC |
| 元件分類(lèi)： | 模擬運(yùn)算功能 |
| 英文描述： | LOG OR ANTILOG AMPLIFIER, 395 MHz BAND WIDTH, CDIP16 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-16 |
| 文件頁(yè)數(shù)： | 6/16頁(yè) |
| 文件大?。?/td> | 397K |
| 代理商： | 5962-9864601QEX |
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REV. A
AD8306
–14–
Table III. Evaluation Board Setup Options
Component
Function
Default Condition
SW1
Device Enable
. When in Position A, the ENBL pin is connected to +VS and the
SW1 = A
AD8306 is in normal operating mode. In Position B, the ENBL pin is connected
to an SMA connector labeled Ext Enable. A signal can be applied to this connector
to enable/disable the AD8306.
R1
This pad is used to ac-couple INLO to ground for single-ended input drive. To drive
R1 = 0
the AD8306 differentially, R1 should be removed.
R/L, C1, C2
Input Interface.
The 52.3
resistor in position R10, along with C1 and C2, create
R10 = 52.3
a high-pass input filter whose corner frequency (640 kHz) is equal to 1/(2
πRC),
C1 = C2 = 0.01
F
where C = (C1)/2 and R is the parallel combination of 52.3
and the AD8306’s
input impedance of 1000
. Alternatively, the 52.3 resistor can be replaced by
an inductor to form an input matching network. See Input Matching Network
section for more details.
R3/R4
Slope Adjust.
A simple slope adjustment can be implemented by adding a resistive
R3 = 0
divider at the VLOG output. R3 and R4, whose sum should be about 1 k
, and
R4 =
never less than 40
(see specs), set the slope according to the equation:
Slope = 20 mV/dB
× R4/(R3 + R4).
L1, C5, C6
Limiter Output Coupling.
C5 and C6 ac-couple the limiter’s differential outputs.
L1 = Open
By adjusting these values and installing an inductor in L1, an output matching
C5 = 0.01
F
network can be implemented. To convert the limiter’s differential output to single-
C6 = 0.01
F
ended, R11 and R12 (nominally 0
) can be replaced with a surface mount balun
R9 = Open
such as the ETC1-1-13 (Macom). The balun can be grounded by soldering a 0
R10 = R11 = 0
into Position R9 (nominally open).
R8, LK1
Limiter Output Current.
With LK1 installed, R8 enables and sets the limiter
LK1 Installed. R8 = 402
output current. The limiter’s output current is set according to the equation
R6, R7 (Limited Load
(IOUT = 400 mV/R8). The limiter current can be as high as 10 mA (R8 = 40 ).
Resistors) = 50
To disable the limiter (recommended if the limiter is not being used), LK1 should
be removed.
C7
RSSI Bandwidth Adjust
. The addition of C7 (farads) will lower the RSSI bandwidth of
C7 = Open
the VLOG output according to the equation: fCORNER (Hz) = 12.7 × 10
–6/(C7 + 3.5
× 10–12).
1
2
3
4
5
6
7
8
VLOG
VPS2
PADL
LMHI
LMLO
PADL
FLTR
LMDR
COM2
VPS1
PADL
INHI
INLO
PADL
COM1
ENBL
AD8306
9
10
11
14
15
16
12
13
C3
0.1 F
R10
52.3
C1
0.01 F
C2
0.01 F
R2
10
R1
0
+VS
EXT
ENABLE
C7 (OPEN)
R6
50
C4
0.1 F
R7
50
R3
0
R5
10
R4
(OPEN)
VRSSI
+VS
L1
(OPEN)
C5
0.01 F
C6
0.01 F
LK1
R8
402
SIG
INHI
SIG
INLO
A
BSW1
R12
0
R11
0
R9
(OPEN)
Figure 33. Evaluation Board Schematic
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