參數(shù)資料
型號(hào)： 5962D0153301QXX
元件分類： SRAM
英文描述： 512K X 32 MULTI DEVICE SRAM MODULE, 35 ns, QMA68
封裝： DUAL CAVITY, CERAMIC, QFP-68
文件頁(yè)數(shù)： 10/14頁(yè)
文件大?。?/td> 124K
代理商： 5962D0153301QXX
5
DC ELECTRICAL CHARACTERISTICS (Pre/Post-Radiation)*
(-40
°C to +125°C) (V
DD = 3.3V + 0.3)
Notes:
* Post-radiation performance guaranteed at 25
°C per MIL-STD-883 Method 101 9.
1. Measured only for initial qualification and after process or design changes that could affect input/output capacitance.
2. Supplied as a design limit but not guaranteed or tested.
3. Not more than one output may be shorted at a time for maximum duration of one second.
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
V
IH
High-level input voltage
(CMOS)
2.0
V
VIL
Low-level input voltage
(CMOS)
0.8
V
VOL1
Low-level output voltage
IOL = 8mA, VDD =3.0V
0.4
V
OL2
Low-level output voltage
I
OL = 200 A,VDD =3.0V
0.08
V
VOH1
High-level output voltage
IOH = -4mA,VDD =3.0V
2.4
V
OH2
High-level output voltage
I
OH = -200A,VDD =3.0V
V
DD-0.10
V
CIN
1
Input capacitance
= 1MHz @ 0V
10
pF
CIO
1
Bidirectional I/O capacitance
= 1MHz @ 0V
12
pF
I
IN
Input leakage current
V
SS < VIN < VDD, VDD = VDD (max)
-2
2
A
IOZ
Three-state output leakage current
0V < VO < VDD
VDD = VDD (max)
G = VDD (max)
-2
2
A
IOS
2, 3
Short-circuit output current
0V < VO < VDD
-90
90
mA
I
DD(OP)
Supply current operating
@ 1MHz
(per byte)
Inputs: VIL = 0.8V,
VIH = 2.0V
IOUT = 0mA
V
DD = VDD (max)
125
mA
IDD1(OP)
Supply current operating
@40MHz
(per byte)
Inputs: VIL = 0.8V,
VIH = 2.0V
IOUT = 0mA
VDD = VDD (max)
180
mA
I
DD2 (SB)
Nominal standby supply current
@0MHz
(per byte)
Inputs: V
IL = VSS
I
OUT = 0mA
En = VDD - 0.5,
VDD = VDD (max)
VIH = VDD - 0.5V
6
40
mA
-40
°C and 25°C
+125
°C
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