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參數(shù)資料
| 型號： | 5962R0151901TXX |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | DUAL 3-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封裝： | CERAMIC, LCC-68 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 2403K |
| 代理商： | 5962R0151901TXX |
Test
Mil
AD10265AZ
Parameter
Temp
Level
Subgroup
Min
Typ
Max
Unit
SPURIOUS-FREE DYNAMIC RANGE
9
Analog Input @ 1.24 MHz
25
°C
I
4
75
80
dBFS
Full
II
5, 6
74
80
dBFS
@ 17 MHz
25
°C
I
4
71
80
dBFS
Full
II
5, 6
70
79
dBFS
@ 32 MHz
25
°C
V
79
dBFS
Full
V
79
dBFS
TWO-TONE IMD REJECTION
10
f1, f2 @ –7 dBFS
Full
V
4, 5, 6
66
77
dBc
CHANNEL-TO-CHANNEL ISOLATION
11
25
°CIV
12
80
dB
LINEARITY
Differential Nonlinearity
(Encode = 20 MHz)
25
°C
IV
12
–1.0
±0.5
+1.5
LSB
Integral Nonlinearity
(Encode = 20 MHz)
Full
V
±1.25
LSB
DIGITAL OUTPUTS
Logic Compatibility
CMOS
Logic “1” Voltage
Full
I
1, 2, 3
2.8
DVCC – 0.2
V
Logic “0” Voltage
Full
I
1, 2, 3
0.2
0.5
V
Output Coding
Two’s Complement
POWER SUPPLY
AVCC Supply Voltage
Full
V
+5.0
V
I (AVCC) Current
Full
V
336
mA
AVEE Supply Voltage
Full
V
–5.0
V
I (AVEE) Current
Full
V
66
mA
CC Supply Voltage
Full
V
+3.3
V
I (DVCC) Current
Full
V
20
mA
ICC (Total) Supply Current
Full
I
1, 2, 3
422
520
mA
Power Dissipation (Total)
Full
I
1, 2, 3
2.1
2.4
W
Power Supply Rejection Ratio (PSRR)
Full
IV
12
0.01
0.02
% FSR/% VS
NOTES
1Gain tests are performed on A
IN1 over specified input voltage range.
2Input capacitance specifications show only ceramic package capacitance.
3Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4ENCODE driven by single-ended source;
ENCODE bypassed to ground through 0.01
F capacitor.
5ENCODE may also be driven differentially in conjunction with
ENCODE; see “Encoding the AD10265” for details.
6Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50%
± 5%.
7Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first 5 harmonics removed). Encode = 65 MSPS.
8Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 65 MSPS.
9Analog Input signal equal –1 dBFS; SFDR is ratio of converter full scale to worst spur.
10Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product. f1 = 17.0 MHz
± 100 kHz, f2 = 18.0 MHz ± 100 kHz.
11Channel-to-channel isolation tested with A channel/50 ohm terminated <A
IN2 grounded, and a full-scale signal applied to B channel (A IN1).
All specifications guaranteed within 100 ms of initial power-up, regardless of sequencing.
Specifications subject to change without notice.
AD10265
–3–
REV. A
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