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參數(shù)資料
| 型號： | 5962R0722701VZA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDSO16 |
| 封裝： | CERAMIC, SOIC-16 |
| 文件頁數(shù)： | 21/22頁 |
| 文件大小： | 510K |
| 代理商： | 5962R0722701VZA |
Burn In Delta Parameters
T
A @ 25°C
The following specifications apply for V
A = VD = +2.7V to +5.25V, AGND = DGND = 0V, fSCLK = 0.8 MHz to 16 MHz, fSAMPLE = 50
kSPS to 1 MSPS, and C
L = 50pF.
Symbol
Parameter
Conditions
Notes
Typical
Mim
Max
Units
Sub-
groups
INL
Integral Non-LInearity
V
A = VD = 3.0V
.106
0.5
+0.5
LSB
V
A = VD = +5.0V
.016
0.35
+0.35
LSB
IMD
Intermodulation Distortion,
Second Order Terms
V
A = VD = 3.0V
1.35
14
+14
dB
V
A = VD = 5.0V
1.67
17
+17
dB
IMD
Intermodulation Distortion,
Third Order Terms
V
A = VD = 3.0V
.47
10
+10
dB
V
A = VD = 5.0V
.90
10
+10
dB
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2:
All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3:
When the input voltage at any pin exceeds the power supplies (that is, V
IN < AGND or VIN > VA or VD), the current at that pin should be limited to 10 mA.
The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two.
Note 4:
The absolute maximum junction temperature (T
Jmax) for this device is 175°C. The maximum allowable power dissipation is dictated by TJmax, the
junction-to-ambient thermal resistance (
θ
JA), and the ambient temperature (TA), and can be calculated using the formula PDMAX = (TJmax TA)/θJA. The values
for maximum power dissipation listed above will be reached only when the ADC128S102QML is operated in a severe fault condition (e.g. when input or output
pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5:
Human body model is 100 pF capacitor discharged through a 1.5 k
resistor. Machine model is 220 pF discharged through ZERO ohms
Note 6:
Typical figures are at T
J = 25°C, and represent most likely parametric norms.
Note 7:
This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 8:
Clock may be in any state (high or low) when CS goes high. Setup and hold time restrictions apply only to CS going low.
Note 9:
Pre and post irradiation limits are identical to those listed in the “DC Parameters” and “AC and Timing Characteristics” tables, except as listed in the
“Radiation Electrical Characteristics” table. When performing post irradiation electrical measurements for any RHA level, T
A = +25°C.
Note 10:
This is worse case drift, Deltas are performed at room temperature post operational life. All other parameters, no deltas are required.
www.national.com
8
ADC128S102QML
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