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參數(shù)資料
| 型號(hào)： | 5962R1023601VXC |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | 16-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDFP28 |
| 封裝： | CERAMIC, FLATPACK-28 |
| 文件頁數(shù)： | 3/22頁 |
| 文件大?。?/td> | 176K |
| 代理商： | 5962R1023601VXC |
11
DIGITAL TIMING CHARACTERISTICS (UT16MX113)1
(VDD=3.3V; -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered
Notes:
1. For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25oC per MIL-STD-883 Method 1019, Condition
A up to the maximum TID level procured (see ordering information).
2. Device is production tested with RL=50 Ohm. The device is characterized with RL=500Ohm.
3. A minimum of RL=500 Ohm is needed to guarantee performance continuous DC operation for a 15 yr. lifetime.
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
Asynchronous Parallel Interface (UT16MX113)
AVDD
AVSS
tPROP_S
Propagation delay of analog input
(S[15:0] to analog output (COM).2,3
RL=500 Ohm
CL=50pF
5.0
.0V
31
ns
tPROP_D
Propagation delay of digital input
(A[3:0], CS, PLATCH, SS) to analog
output (COM).
RL=1k Ohm
CL=50pF
See Figure 4.
5.0
0V
31
135
ns
tMUX
Mux decoding time
RL=1k Ohm
CL=50pF
See Figure 4.
5.0
0V
13
50
ns
tBBM
Break-Before-Make-Delay
RL=1k Ohm
CL=50pF
See Figure 4.
5.0
0V
21
86
ns
tCYCLE
Minimum MUX cycle rate
See Figure 3.
125
ns
tASU
The minimum amount of time that the
addresses should be set before the
falling edge of CS.
See Figure 4.
3
ns
tAHD
The minimum amount of time that the
addresses should be held before the
rising edge of CS.
See Figure 4.
5
ns
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