5
Biasing and Operation
The recommended quiescent
DC bias condition for optimum
efficiency, performance, and
reliability is Vd=5.5 volts with
Vg set for Id=800 mA. Minor
improvements in performance
are possible depending on the
application. The drain bias
voltage range is 3 to 5.5V. A
single DC gate supply
connected to Vg will bias all
gain stages. Muting can be
accomplished by setting Vg to
the pinch-off voltage Vp (-
1.0V).
An optional output power
detector network is also
provided. The differential
voltage between the Det-Ref
and Det-Out pads can be
correlated with the RF power
emerging from the RF output
port. The detected voltage is
given by :
(
)
ofs
ref
V
=
det
where
ref
V is the voltage at the
R
DET _
port,
det
V is a voltage at
the
O
DET _
port, and
ofs
V is the
zero-input-power offset
voltage. There are three
methods to calculate :
1.
ofs
V
can be measured before
each detector measurement
(by removing or switching
off the power source and
measuring ). This method
gives an error due to
temperature drift of less
than 0.01dB/50°C.
2.
ofs
V
can be measured at a
single reference temperature.
The drift error will be less
than 0.25dB.
3.
ofs
V
can either be
characterized over
temperature and stored in a
lookup table, or it can be
measured at two
temperatures and a linear
series inductance. A single
bond wire is normally
sufficient for signal
connections, however double
bonding with 0.7 mil gold wire
or use of gold mesh [2] is
recommended for best
performance, especially near
the high end of the frequency
band.
Thermosonic wedge bonding is
preferred method for wire
attachment to the bond pads.
Gold mesh can be attached
using a 2 mil round tracking
tool and a tool force of
approximately 22 grams and a
ultrasonic power of roughly 55
dB for a duration of 76 +/- 8
mS. The guided wedge at an
untrasonic power level of 64
dB can be used for 0.7 mil
wire. The recommended wire
bond stage temperature is 150
+/- 2C.
Caution should be taken to not
exceed the Absolute Maximum
Rating for assembly
temperature and time.
The chip is 100um thick and
should be handled with care.
This MMIC has exposed air
bridges on the top surface and
should be handled by the
edges or with a custom collet
(do not pick up the die with a
vacuum on die center).
This MMIC is also static
sensitive and ESD precautions
should be taken.
Notes:
[1] Ablebond 84-1 LM1 silver epoxy is
recommended.
[2] Buckbee-Mears Corporation, St. Paul, MN,
800-262-3824
fit used to calculate at any
temperature. This method
gives an error close to the
method #1.
The RF ports are AC coupled
at the RF input to the first
stage and the RF output of the
final stage. No ground wires
are needed since ground
connections are made with
plated through-holes to the
backside of the device.
Assembly Techniques
The backside of the MMIC
chip is RF ground. For
microstrip applications the
chip should be attached
directly to the ground plane
(e.g. circuit carrier or
heatsink) using electrically
conductive epoxy [1]
For best performance, the
topside of the MMIC should be
brought up to the same height
as the circuit surrounding it.
This can be accomplished by
mounting a gold plate metal
shim (same length and width
as the MMIC) under the chip
which is of correct thickness
to make the chip and adjacent
circuit the same height. The
amount of epoxy used for the
chip and/or shim attachment
should be just enough to
provide a thin fillet around the
bottom perimeter of the chip
or shim. The ground plain
should be free of any residue
that may jeopardize electrical
or mechanical attachment.
The location of the RF bond
pads is shown in Figure 12.
Note that all the RF input and
output ports are in a Ground-
Signal-Ground configuration.
RF connections should be kept
as short as reasonable to
minimize performance
degradation due to undesirable