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參數(shù)資料
| 型號： | 635P6I3FREQ |
| 廠商： | CTS CORP |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 19.44 MHz - 250 MHz, LVPECL OUTPUT |
| 封裝： | GREEN, CERAMIC PACKAGE-6 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 153K |
| 代理商： | 635P6I3FREQ |
Document No. 008-0284-0
Page 3 - 4
Rev. D
CTS Electronic Components, Inc. 171 Covington Drive Bloomingdale, IL 60108
Model 635
7.5x5.0mm Low Cost
LVPECL or LVDS Clock Oscillator
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
MARKING INFORMATION
0.303 MAX
(7.7)
0.100
(2.54)
5
2
(2.0)
MAX
(5.08)
0.200
0.055
0.079
(5.0 ±0.2)
0.197 ±0.008
(1.4)
0.147
(3.73)
Key: (mm)
Inch
3
46
PIN 1 IDENTIFIER
0.050
(1.27)
1
SUGGESTED SOLDER PAD GEOMETRY
.165 [4.20]
.071 [1.80]
Key:
[mm]
Inch
13
4
6
C BYPASS
2
5
.200 [5.08]
.100 [2.54]
.079 [2.00]
D.U.T. PIN ASSIGNMENTS
PIN
SYMBOL
DESCRIPTION
1
EOH or N.C.
Enable (std) or optional No Connect
2
EOH or N.C.
No Connect (std) or optional Enable
3
GND
Circuit & Package Ground
4
Output
RF Output
5
Output
Complimentary RF Output
6
VCC
Supply Voltage
1. ** - Manufacturing Site Code.
2. YYWW – Date code, YY – year, WW – week.
3. Truncated CTS part number.
4. XXXMXXXX - Frequency marked with 4
significant digits after the ‘M’.
NOTES
1. Termination pads (e4), barrier-plating is nickel
(Ni) with gold (Au) flash plate.
2. Reflow conditions per JEDEC J-STD-020.
CTS ** YYWW
635P3C3
● XXXMXXXX
TEST CIRCUIT, PECL LOAD
TEST CIRCUIT, LVDS LOAD
Enable Input or N.C.
0.01uF
SUPPLY
POWER
-
+
-
VM
-
mA
N.C. or Enable Input
(Thevenin Equivalent)
3
4
12
D.U.T.
65
Vcc - 2.0V
50
R L
50
R L
Vcc - 2.0V
CH1
CH2
POWER
SUPPLY
+
-
+
-
+
VM
mA
0.01uF
D.U.T.
64
12
N.C. or Enable Input
3
5
CH1
CH2
100
R L
Enable Input or N.C.
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