參數(shù)資料
型號: 6N137
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 光電耦合器
英文描述: HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS
中文描述: 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 10 Mbps
封裝: DIP-8
文件頁數(shù): 4/11頁
文件大?。?/td> 215K
代理商: 6N137
Characteristics
Input-Output
Insulation Leakage Current
Test Conditions
Symbol
Min
Typ**
Max
Unit
(Relative humidity = 45%)
(T
A
= 25
°
C, t = 5 s)
(V
I-O
= 3000 VDC)
I
I-O
1.0*
μA
(Note 12)
Withstand Insulation Test Voltage
(RH < 50%, T
A
= 25
°
C)
(Note 12) ( t = 1 min.)
(V
I-O
= 500 V) (Note 12)
(f = 1 MHz) (Note 12)
V
ISO
2500
V
RMS
Resistance (Input to Output)
Capacitance (Input to Output)
** All typical values are at V
CC
= 5 V, T
A
= 25
°
C
R
I-O
C
I-O
10
12
0.6
1
pF
ISOLATION CHARACTERISTICS
(T
A
= -40
°
C to +85
°
C Unless otherwise specified.)
1.
The V
CC
supply to each optoisolator must be bypassed by a 0.1μF capacitor or larger. This can be either a ceramic or solid tantalum
capacitor with good high frequency characteristic and should be connected as close as possible to the package V
CC
and GND pins
of each device.
Each channel.
Enable Input - No pull up resistor required as the device has an internal pull up resistor.
t
PLH
- Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V
level on the LOW to HIGH transition of the output voltage pulse.
t
PHL
- Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V
level on the HIGH to LOW transition of the output voltage pulse.
6. t
r
- Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7.
t
f
- Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8.
t
ELH
- Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input voltage pulse
to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
9.
t
EHL
- Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input voltage pulse
to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
10. CM
H
- The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state
(i.e., V
OUT
> 2.0 V). Measured in volts per microsecond (V/μs).
11. CM
L
- The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the low output state
(i.e., V
OUT
< 0.8 V). Measured in volts per microsecond (V/μs).
12. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
2.
3.
4.
5.
NOTES
DC Characteristics
High Level Output Current
Test Conditions
Symbol
Min
Typ**
Max
Unit
(V
CC
= 5.5 V, V
O
= 5.5 V)
(I
F
= 250 μA, V
E
= 2.0 V) (Note 2)
(V
CC
= 5.5 V, I
F
= 5 mA)
(V
E
= 2.0 V, I
CL
= 13 mA) (Note 2)
(V
CC
= 5.5 V, V
O
= 0.6 V,
V
E
= 2.0 V, I
OL
= 13 mA)
I
OH
100
μA
Low Level Output Current
V
OL
.35
0.6
V
Input Threshold Current
I
FT
3
5
mA
TRANSFER CHARACTERISTICS
(T
A
= -40
°
C to +85
°
C Unless otherwise specified.)
HIGH SPEED-10 MBit/s
LOGIC GATE OPTOCOUPLERS
www.fairchildsemi.com
4 OF 11
7/9/01
DS300202
SINGLE-CHANNEL
6N137
HCPL-2601
HCPL-2611
DUAL-CHANNEL
HCPL-2630
HCPL-2631
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