參數(shù)資料
型號： 71M6531D-IMR/F
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68
封裝： LEAD FREE, QFN-68
文件頁數(shù)： 67/120頁
文件大小： 2477K
代理商： 71M6531D-IMR/F
Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
50
2005-2010 TERIDIAN Semiconductor Corporation
v1.3
Table 49: SPI Command Description
Command
Description
11xx xxxx ADDR Byte0 ... ByteN
Read data starting at ADDR. The ADDR will auto-increment until PCSZ
is raised. Upon completion:
SP__CMD=11xx xxxx, SP_ADDR=ADDR+N+1.
No MPU interrupt is generated if the command is 1100 0000. Otherwise,
an SPI interrupt is generated.
10xx xxxx ADDR Byte0 ... ByteN
Write data starting at ADDR. The ADDR will auto-increment until PCSZ
is raised. Upon completion:
SP_CMD=10xx xxxx, SP_ADDR=ADDR+N+1.
No MPU interrupt is generated if the command is 1000 0000. Otherwise,
an SPI interrupt is generated.
Certain I/O RAM registers can be written and read using the SPI port (see Table 50). However, the MPU
takes priority over the I/O RAM bus, and SPI operation may fail without notice. To avoid this situation, the
SPI host should send a command other than 11xxxxxx or 10xxxxxx (read or write) before the actual read
or write command. The SPI slave interface will load the command register and generate an INT2 inter-
rupt upon receiving the command. The MPU should service the interrupt and halt any external data memory
operations to effectively grant the bus to the SPI. When the SPI host finishes, it should send another
command so the MPU can release the bus. There are no issues with Data RAM access; SPI and the
MPU will share the bus with no conflicts for Data RAM access.
Table 50: I/O RAM Registers Accessible via SPI
Name
Address (hex)
Bit Range
Read/Write
CE0
2000
7:3
RW
CE1
2001
7:0
RW
CE2
2002
5:3, 1:0
RW
CONFIG0
2004
7:6, 3:0
RW
CONFIG1
2005
5:2, 0
RW
VERSION
2006
7:0
R
CONFIG2
2007
7:0
RW
DIO0
2008
7:6, 4:0
RW
DIO1 to DIO6
2009 to 200E
6:4, 2:0
RW
200F
7:6, 3:2
RW
RTM0H
2060
1:0
RW
RTM0L
2061
7:0
RW
RTM1H
2062
1:0
RW
RTM1L
2063
7:0
RW
RTM2H
2064
1:0
RW
RTM2L
2065
7:0
RW
RTM3H
2066
1:0
RW
RTM3L
2067
7:0
RW
PLS_W
2080
7:0
RW
PLS_I
2081
7:0
RW
SLOT0 to SLOT9
2090 to 209A
7:0
RW
CE3
209D
3:0
RW
CE4
20A7
7:0
RW
CE5
20A8
7:0
RW
WAKE
20A9
7:5, 3:0
R
CONFIG3
20AC
5:4, 1:0
RW
CONFIG4
20AD
5:4, 1:0
RW
20AF
2:0
RW
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相關代理商/技術參數(shù)
參數(shù)描述
71M6531F 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC
71M6531F-DB 功能描述:開發(fā)板和工具包 - 8051 71M6531F Demo Brd RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
71M6531F-IM/F 功能描述:計量片上系統(tǒng) - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6531F-IM/F3 功能描述:計量片上系統(tǒng) - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6531F-IM/F4 功能描述:計量片上系統(tǒng) - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
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