- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382812 > 73K222AL (TDK Corporation) V.22, V.21, Bell 212A, 103 Single-Chip Modem PDF資料下載
參數(shù)資料
| 型號(hào)： | 73K222AL |
| 廠商： | TDK Corporation |
| 英文描述： | V.22, V.21, Bell 212A, 103 Single-Chip Modem |
| 中文描述： | .22，.21，貝爾212A章，103單芯片調(diào)制解調(diào)器 |
| 文件頁數(shù)： | 4/28頁 |
| 文件大?。?/td> | 160K |
| 代理商： | 73K222AL |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
73K222AL
V.22, V.21, Bell 212A, 103
Single-Chip
4
PIN DESCRIPTION
POWER
NAME
28-PIN
TYPE
DESCRIPTION
GND
28
I
System Ground.
VDD
15
I
Power supply input, 5V ±10%. Bypass with 0.1 and 22 μF capacitors to
GND.
VREF
26
O
An internally generated reference voltage. Bypass with 0.1 μF
capacitor to ground.
ISET
24
I
Chip current reference. Sets bias current for op-amps. The chip
current is set by connecting this pin to VDD through a 2 M
resistor.
ISET should be bypassed to GND with a 0.1 μF capacitor.
PARALLEL MICROPROCESSOR INTERFACE
ALE
12
I
Address latch enable. The falling edge of ALE latches the address on
AD0-AD2 and the chip select on
CS
.
AD0-AD7
4-11
I/O
Address/data bus. These bidirectional tri-state multiplexed lines carry
information to and from the internal registers.
CS
20
I
Chip select. A low on this pin during the falling edge of ALE allows a
read cycle or a write cycle to occur. AD0-AD7 will not be driven and no
registers will be written if
CS
(latched) is not active. The state of
CS
is
latched on the falling edge of ALE.
CLK
1
O
Output clock. This pin is selectable under processor control to be either
the crystal frequency (for use as a processor clock) or 16 x the data
rate for use as a baud rate clock in DPSK modes only. The pin defaults
to the crystal frequency on reset.
INT
17
O
Interrupt. This open drain output signal is used to inform the processor
that a detect flag has occurred. The processor must then read the
detect register to determine which detect triggered the interrupt.
INT
will stay low until the processor reads the detect register or does a full
reset.
RD
14
I
Read. A low requests a read of the 73K222AL internal registers. Data
cannot be output unless both
RD
and the latched
CS
are active or low.
RESET
25
I
Reset. An active high signal on this pin will put the chip into an inactive
state. All control register bits (CR0, CR1, Tone) will be reset. The
output of the CLK pin will be set to the crystal frequency. An internal
pull down resistor permits power on reset using a capacitor to VDD.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 73K222AL-IGT | V.22, V.21, Bell 212A, 103 Single-Chip Modem |
| 73K222AL-IH | V.22, V.21, Bell 212A, 103 Single-Chip Modem |
| 73K222AL-IP | V.22, V.21, Bell 212A, 103 Single-Chip Modem |
| 73K222AU | Single-Chip Modem Modem with UART |
| 73K222AU-IH | Single-Chip Modem Modem with UART |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 73K222AL-IGT | 制造商:TDK 制造商全稱:TDK Electronics 功能描述:V.22, V.21, Bell 212A, 103 Single-Chip Modem |
| 73K222AL-IH | 制造商:TDK 制造商全稱:TDK Electronics 功能描述:V.22, V.21, Bell 212A, 103 Single-Chip Modem |
| 73K222AL-IH/F | 功能描述:電信集成電路 Single Chip Modem /103 Modem Data Pump RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| 73K222AL-IHR/F | 功能描述:電信集成電路 Single Chip Modem /103 Modem Data Pump RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray |
| 73K222AL-IP | 制造商:TDK 制造商全稱:TDK Electronics 功能描述:V.22, V.21, Bell 212A, 103 Single-Chip Modem |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。