參數(shù)資料
型號(hào): 73S8009R-IL
廠商: TERIDIAN SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO28
封裝: SOP-28
文件頁(yè)數(shù): 9/23頁(yè)
文件大小: 342K
代理商: 73S8009R-IL
DS_8009R_056
73S8009R Data Sheet
Rev. 1.3
17
PRES
OFF
CMDVCC
VCC
outside card session
within card session
OFF is low by
card extracted
OFF is low by
any fault
within card
session
Figure 7: OFF Activity Outside and Inside a Card Session
3.8
Power-down Operation
A power-down function is provided that disables all analog functions. The power-down state is only
allowed in the de-activated condition. The host invokes the power-down state when it is desirable to save
power.
The signals PRES and
PRES are functional in the power-down state so that a card insertion asserts OFF
high. If there is no card present (
OFF = low) in power-down mode, the pull-up resistor is disabled so that
no current is drawn from VDD. If a card is inserted, the pull-up resistor is enabled and
OFF goes high.
Upon receiving the
OFF indication, the host must then de-assert power down (PWRDN) and wait until the
circuit is ready. When PWRDN is de-asserted,
OFF goes low to indicate that the circuit is not ready (it is
going through the power-on recovery time). When the circuit is ready,
OFF will go high if the card is
present. Figure 8 illustrates the behavior of the circuit for PWRDN events.
PRES
OFF
PWRDN
RC OSC
CMDVCC3 /
CMDVCC5
RDY - indicates VCC is OK
PWRDN while CMDVCCx=0
has no effect
Controller must wait for OFF=1 after
setting PWRDN=0 before setting
CMDVCC(3/5)=0
~30 s
PWRDN will have effect
when CMDVCCx=1
~30 s
OFF going high indicates
circuit is ready
OFF will go high if card is present and there are no faults
OFF goes low when PWRDN is de-asserted while circuit starts up
Figure 8: Power-down Operation
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