參數(shù)資料
型號(hào): 7401
廠商: National Semiconductor Corporation
英文描述: Quad 2-Input NAND Gates with Open-Collector Outputs
中文描述: 四2輸入與非門與集電極開路輸出
文件頁數(shù): 1/4頁
文件大小: 97K
代理商: 7401
TL/F/6614
D
June 1989
DM5401/DM7401 Quad 2-Input NAND Gates
with Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic NAND function. The open-collector out-
puts require external pull-up resistors for proper logical op-
eration.
Pull-Up Resistor Equations
R
MAX
e
V
CC
(Min)
b
V
OH
N
1
(I
OH
)
a
N
2
(I
IH
)
R
MIN
e
V
CC
(Max)
b
V
OL
I
OL
b
N
3
(I
IL
)
Where: N
1
(I
OH
)
e
total maximum output high current for all
outputs tied to pull-up resistor
N
2
(I
IH
)
e
total maximum input high current for all
inputs tied to pull-up resistor
N
3
(I
IL
)
e
total maximum input low current for all
inputs tied to pull-up resistor
Connection Diagram
Dual-In-Line Package
TL/F/6614–1
Order Number DM5401J, DM5401W or DM7401N
See NS Package Number J14A, N14A or W14B
Function Table
Y
e
AB
Inputs
Output
A
B
Y
L
L
H
H
L
H
L
H
H
H
H
L
H
e
High Logic Level
L
e
Low Logic Level
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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