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參數(shù)資料
| 型號(hào)： | 74173 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit D-type Register (with 3-state Outputs) |
| 中文描述： | 4位D型寄存器（3態(tài)輸出） |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 69K |
| 代理商： | 74173 |
December 1990
6
Philips Semiconductors
Product specification
Quad D-type flip-flop; positive-edge trigger; 3-state
74HC/HCT173
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL
PARAMETER
T
amb
(
°
C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+
25
40 to
+
85
40 to
+
125
min.
typ.
max. min. max. min.
max.
t
PHL
/ t
PLH
propagation delay
CP to Q
n
55
20
16
44
16
13
52
19
15
52
19
15
14
5
4
14
5
4
14
5
4
8
3
2
33
12
10
17
6
5
175
35
30
150
30
26
150
30
26
150
30
26
60
12
10
220
44
37
190
38
33
190
38
33
190
38
33
75
15
13
265
53
45
225
45
38
225
45
38
225
45
38
90
18
15
ns
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.6
t
PHL
propagation delay
MR to Q
n
ns
Fig.7
t
PZH
/ t
PZL
3-state output enable time
OE
n
to Q
n
ns
Fig.8
t
PHZ
/ t
PLZ
3-state output disable time
OE
n
to Q
n
ns
Fig.8
t
THL
/ t
TLH
output transition time
ns
Fig.6
t
W
clock pulse width
HIGH or LOW
80
16
14
80
16
14
60
12
10
100
20
17
60
12
10
100
20
17
100
20
17
75
15
13
125
25
21
75
15
13
120
24
20
120
24
20
90
18
15
150
30
26
90
18
15
ns
Fig.6
t
W
master reset pulse
width; HIGH
ns
Fig.7
t
rem
removal time
MR to CP
ns
Fig.7
t
su
set-up time
E
n
to CP
ns
Fig.9
t
su
set-up time
D
n
to CP
ns
Fig.9
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74173 WAF | 制造商:Texas Instruments 功能描述: |
| 7-417399-7 | 制造商:TE Connectivity 功能描述:FOPC BOA 7.5DBST/UPC BP SM - Bulk |
| 74173DC | 制造商:Texas Instruments 功能描述: |
| 74173PC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74173PCQR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Fairchild Semiconductor Corporation 功能描述: |
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