參數(shù)資料
型號: 74ABT162245ADL,118
廠商: NXP Semiconductors
文件頁數(shù): 9/12頁
文件大?。?/td> 0K
描述: IC TRANSCVR TRI-ST 16BIT 48SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 1,000
系列: 74ABT
邏輯類型: 收發(fā)器,非反相
元件數(shù): 2
每個元件的位元數(shù): 8
輸出電流高,低: 32mA,12mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 帶卷 (TR)
其它名稱: 74ABT162245ADL-T
74ABT162245ADL-T-ND
935204120118
Philips Semiconductors
Product specification
74ABT162245A
74ABTH162245A
16-bit bus transceiver with 30
series
termination resistors (3-State)
1998 Feb 25
6
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25°C
Tamb = –40°C
to +85
°C
UNIT
Min
Typ
Max
Min
Max
VIK
Input clamp voltage
VCC = 4.5V; IIK = –18mA
–0.9
–1.2
V
VCC = 4.5V; IOH = –3mA; VI = VIL or VIH
2.5
2.9
2.5
V
VOH
High-level output voltage
VCC = 5.0V; IOH = –3mA; VI = VIL or VIH
3.0
3.4
3.0
V
VCC = 4.5V; IOH = –32mA; VI = VIL or VIH
2.0
2.4
2.0
V
VO
Low-level output voltage
VCC = 4.5V; IOL = 8mA; VI = VIL or VIH
0.46
0.65
V
VOL
Low-level output voltage
VCC = 4.5V; IOL = 12mA; VI = VIL or VIH
0.50
0.80
V
II
Input leakage current
VCC = 5.5V; VI = GND or 5.5V
Control
pins
±0.01
±1.0
A
Bus hold current
VCC = 4.5V; VI = 0.8V
50
IHOLD
Bus hold current
A and B inputs4
74ABTH162245A
VCC = 5.5V; VI = 2.0V
–75
A
74ABTH162245A
VCC = 5.5V; VI = 0 to 5.5V
±500
IOFF
Power-off leakage current
VCC = 0.0V; VO or VI ≤ 4.5V
±5.0
±100
A
IPU/IPD
Power-up/down 3-State
output current3
VCC = 2.0V; VO = 0.5V; VI = GND or VCC;
VOE = Don’t care
±5.0
±50
A
IIH+IOZH
3-State output High current
VCC = 5.5V; VO = 5.5V; VI = VIL or VIH
0.5
10
A
IIL+IOZL
3-State output Low current
VCC = 5.5V; VO = 0.0V; VI = VIL or VIH
–0.5
–10
A
ICEX
Output high leakage current
VCC = 5.5V; VO = 5.5V; VI = GND or VCC
5.0
50
A
IO
Output current1
VCC = 5.5V; VO = 2.5V
–50
–92
–180
–50
–180
mA
ICCH
VCC = 5.5V; Outputs High, VI = GND or VCC
0.3
0.70
mA
ICCL
Quiescent supply current
VCC = 5.5V; Outputs Low, VI = GND or VCC
10
19
mA
ICCZ
VCC = 5.5V; Outputs 3-State;
VI = GND or VCC
0.3
0.70
mA
Outputs enabled, one data input at 3.4V,
other inputs at VCC or GND; VCC = 5.5V
400
700
A
Additional supply current per
Outputs 3-State, one data input at 3.4V, other
inputs at VCC or GND; VCC = 5.5V
74ABT162245A
1.0
50
A
ICC
Additional supply current per
input pin2
Outputs 3-State, one data input at 3.4V, other
inputs at VCC or GND; VCC = 5.5V
74ABTH162245A
100
250
A
Control pins, outputs disabled, one enable
input at 3.4V, other inputs at VCC or GND;
VCC = 5.5V
400
700
A
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5 ±10% a
transition time of up to 100
sec is permitted.
4. This is the bus hold overdrive current required to force the input to the opposite logic state.
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