參數(shù)資料
型號(hào): 74ABT16500CSSC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 18-Bit Universal Bus Transceivers with 3-STATE Outputs
中文描述: ABT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: 0.300 INCH, MO-118, SSOP-56
文件頁數(shù): 4/9頁
文件大?。?/td> 74K
代理商: 74ABT16500CSSC
www.fairchildsemi.com
4
7
DC Electrical Characteristics
Note 7:
Max number of outputs defined as (n). n
1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 8:
Max number of outputs defined as (n). n
1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
Note 9:
Max number of data inputs (n) switching. n
1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
ILD
), 0V to threshold (V
IHD
).
Guaranteed, but not tested.
AC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Conditions
C
L
=
50 pF; R
L
=
500
T
A
=
25
°
C (Note 7)
T
A
=
25
°
C (Note 7)
T
A
=
25
°
C (Note 8)
T
A
=
25
°
C (Note 9)
T
A
=
25
°
C (Note 9)
V
OLP
V
OLV
V
OHV
V
IHD
V
ILD
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Output Voltage
0.7
1.0
3.0
1.2
V
V
V
5.0
5.0
5.0
1.5
2.5
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
2.2
1.8
1.2
V
V
5.0
5.0
0.8
Symbol
Parameter
T
A
=
+
25
°
C
V
CC
=
+
5V
C
L
=
50 pF
Typ
200
2.7
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V–5.5V
C
L
=
50 pF
Min
150
1.5
Units
Min
150
1.5
Max
Max
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum Clock Frequency
Propagation Delay
MHz
ns
4.6
4.6
A or B to B or A
Propagation Delay
LEAB or LEBA to B or A
1.5
1.5
1.5
3.2
3.1
3.6
4.6
5.0
5.0
1.5
1.5
1.5
4.6
5.0
5.0
ns
Propagation Delay
1.5
1.5
3.4
3.7
5.3
5.3
1.5
1.5
5.3
5.3
ns
CLKAB or CLKBA to B or A
Propagation Delay
1.5
1.5
2.7
3.0
5.6
5.6
1.5
1.5
5.6
5.6
ns
OEAB or OEBA to B or A
Propagation Delay
1.5
1.5
3.7
3.2
6.0
6.0
1.5
1.5
6.0
6.0
ns
OEAB or OEBA to B or A
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