參數(shù)資料
型號(hào): 74ABT544DB,118
廠商: NXP Semiconductors
文件頁(yè)數(shù): 11/16頁(yè)
文件大?。?/td> 0K
描述: IC TRANSCVR 3-ST 8BIT INV 24SSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: 74ABT
邏輯類型: 收發(fā)器,反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
輸出電流高,低: 32mA,64mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 24-SSOP
包裝: 帶卷 (TR)
其它名稱: 74ABT544DB-T
74ABT544DB-T-ND
935066520118
74ABT544
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 3 November 2011
4 of 16
NXP Semiconductors
74ABT544
Octal latched transceiver with dual enable; 3-state
6.
Functional description
6.1 Function table
[1]
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX or EXX (XX = AB or BA);
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX or EXX (XX = AB or BA);
= LOW-to-HIGH clock transition of LEXX or EXX (XX = AB or BA);
NC = no change;
X = don’t care;
Z = high-impedance OFF-state.
6.2 Description
The 74ABT544 contains two sets of eight D-type latches, with separate control pins for
each set.
Using data flow from A-to-B as an example, when the A-to-B enable (EAB) input, the
A-to-B latch enable (LEAB) input and the A-to-B output enable (OEAB) input are all LOW,
the A-to-B path is transparent.
A subsequent LOW-to-HIGH transition of the LEAB signal puts the A data into the latches
where it is stored and the B outputs no longer change with the A inputs. With EAB and
OEAB both LOW, the 3-state B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B-to-A is similar, but using the EBA, LEBA, and OEBA inputs.
Table 3.
Function selection[1]
Input
Output
Status
OEXX
EXX
LEXX
An or Bn
Bn or An
H
X
Z
disabled
XH
X
XZ
L
L
h
Z
disabled + latch
lZ
LL
h
L
latch + display
lH
L
H
L
transparent
LH
L
H
X
NC
hold
相關(guān)PDF資料
PDF描述
OSTVC220050 CONN TERM BLK HDR 22POS 7.62MM
OSTHI160053 CONN PLUG HEADER 16PS 5MM
OSTTS20A15D TERM BLOCK PLUG 7.5MM 20POS
OSTTS20A15C TERM BLOCK PLUG 7.5MM 20POS
OSTEV046151 CONN PLUG HEADER 4PS 10.16MM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74ABT544DB-T 功能描述:總線收發(fā)器 OCTAL LATCHED XCVR INV 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74ABT544D-T 功能描述:總線收發(fā)器 OCTAL LATCHED XCVR INV 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74ABT544N 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Octal latched transceiver with dual enable, inverting 3-State
74ABT544N,602 功能描述:總線收發(fā)器 OCTAL LATCHED XCVR INV 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74ABT544PW 功能描述:總線收發(fā)器 OCTAL LATCHED XCVR INV 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel