參數(shù)資料
型號(hào)： 74ABTH16825ADL
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： 18-bit buffer/line driver; non-inverting 3-State
中文描述： ABT SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56
封裝： 7.50 MM, PLASTIC, SOT-371-1, SSOP3-56
文件頁數(shù)： 5/10頁
文件大?。?/td> 75K
代理商： 74ABTH16825ADL
Philips Semiconductors
Product specification
74ABT16825A
74ABTH16825A
18-bit buffer/line driver; non-inverting (3-State)
1998 Feb 25
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
°
C
MIN
UNIT
MIN
TYP
–0.9
2.9
3.4
2.4
0.42
MAX
–1.2
MAX
–1.2
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
V
V
V
V
2.5
3.0
2.0
2.5
3.0
2.0
V
OH
High-level output voltage
V
OL
Low-level output voltage
Input leakage current
ABT16825A
0.55
0.55
I
I
V
CC
= 5.5V; V
I
= GND or 5.5V
±
0.01
±
1.0
±
1.0
μ
A
I
I
Input leakage current
In ut leakage current
74ABTH16825A
V
CC
= 5.5V; V
I
= V
CC
or GND
Control
pins
±
0.01
±
1
±
1
μ
A
V
CC
= 5.5V; V
I
= V
CC
V
CC
= 5.5V; V
I
= 0
V
CC
= 4.5V; V
I
= 0.8V
V
CC
= 4.5V; V
I
= 2.0V
V
CC
= 5.5V; V
I
= 0 to 5.5V
V
CC
= 0.0V; V
O
= 4.5V; V
I
= 0V or 5.5V
V
CC
= 2.1V; V
= 0.5V; V
I
= GND or V
CC
;
V
OE
= Don’t care
V
CC
= 5.5V; V
O
= 5.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.0V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
Data pins
Data ins
4
0.01
–1
1
–3
1
–5
μ
A
μ
A
Bus Hold current A inputs
5
74ABTH16825A
35
–75
±
500
35
–75
I
HOLD
μ
A
I
OFF
Power-off leakage current
Power-up/down 3-State
output current
3
3-State output High current
3-State output Low current
Output High leakage current
Output current
1
±
5.0
±
100
±
100
μ
A
I
PU
/I
PD
±
5.0
±
50
±
50
μ
A
I
OZH
I
OZL
I
CEX
I
O
I
CCH
I
CCL
1.0
–1.0
1.0
–70
0.5
9
10
–10
50
–180
1
19
10
–10
50
–180
1
19
μ
A
μ
A
μ
A
mA
mA
mA
–50
–50
Quiescent supply current
I
CCZ
0.5
1
1
mA
I
CC
Additional supply current per
input pin
2
74ABT16825A
Additional supply current per
input pin
2
74ABTH16825A
10
500
500
μ
A
I
CC
0.2
1
1
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V
CC
between 0V and 2.1V with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5V
±
10% a
transition time of up to 100
μ
sec is permitted.
4. Unused pins at V
CC
or GND.
5. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
o
C
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V
±
0.5V
MIN
1.0
0.6
1.0
1.0
2.0
1.6
UNIT
MIN
1.0
0.6
1.0
1.0
2.0
1.6
TYP
1.8
1.4
2.9
2.9
3.3
2.5
MAX
2.5
2.0
3.8
3.8
4.5
3.4
MAX
2.8
2.3
4.8
5.0
5.2
3.7
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
nAx to nYx
Output enable time
to High and Low level
Output disable time
from High and Low level
1
ns
2
ns
2
ns
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