參數(shù)資料
型號: 74AC541
廠商: 意法半導(dǎo)體
英文描述: Octal Bus Buffer with 3 State Outputs (Non Inverted)(三態(tài)輸出的八總線緩沖器)
中文描述: 八路總線緩沖器的三態(tài)輸出(非反相)(三態(tài)輸出的八總線緩沖器)
文件頁數(shù): 4/8頁
文件大?。?/td> 63K
代理商: 74AC541
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions
Value
Unit
V
CC
(V)
T
A
= 25
o
C
Min.
Typ.
-40 to 85
o
C
Min.
Max.
Max.
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance (note 1)
1)C
PD
isdefined asthevalueoftheIC’sinternal equivalent capacitance whichiscalculated fromtheoperatingcurrent consumption without load.(Refer to
TestCircuit).Average operating current canbeobtained bythefollowingequation. I
CC
(opr)= C
PD
V
CC
f
IN
+I
CC
/8(per circuit)
5.0
5.0
5.0
4
8
21
pF
pF
pF
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
, Input t
r
= t
f
=3 ns)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
T
A
= 25
o
C
Min.
Typ.
1.5
1.5
1.5
1.5
1.5
1.5
-40 to 85
o
C
Min.
1.5
1.5
1.5
1.5
1.5
1.5
Max.
8
6.5
10.5
8
10.5
9
Max.
9
7
11.5
8.5
11.5
9.5
t
PLH
t
PHL
Propagation Delay Time
5
4
7
5
7
6
ns
t
PZL
t
PZH
Output Enable Time
ns
t
PLZ
t
PHZ
Output Disable Time
ns
(*) Voltagerangeis3.3V
±
0.3V
(**) Voltagerange is 5V
±
0.5V
TESTCIRCUIT
TEST
SWITCH
Open
2V
CC
Open
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
C
L
=50pForequivalent(includes jigand probecapacitance)
R
L
=R
1
=500
orequivalent
R
T
=Z
OUT
ofpulsegenerator (typically50
)
74AC541
4/8
相關(guān)PDF資料
PDF描述
74AC573B OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
74AC573M OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
74AC573MTC CTV 99C 97#22D 2#8 SKT WALL RE
74AC573PC Octal Latch with 3-STATE Outputs
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