參數(shù)資料
型號: 74ACT10
廠商: 意法半導體
英文描述: Triple 3-Input Nand Gate(三3輸入與非門)
中文描述: 三3輸入與非門(三3輸入與非門)
文件頁數(shù): 1/7頁
文件大小: 66K
代理商: 74ACT10
74ACT10
TRIPLE 3-INPUT NAND GATE
PRELIMINARY DATA
May 1997
I
HIGH SPEED:t
PD
= 6.5 ns(TYP.) at V
CC
=5V
I
LOWPOWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTLOUTPUTS
V
IH
=2V (MIN), V
IL
=0.8V(MAX)
I
50
TRANSMISSIONLINEDRIVING
CAPABILITY
I
SYMMETRICALOUTPUT IMPEDANCE:
|I
OH
| = I
OL
=24 mA (MIN)
I
BALANCED PROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PIN AND FUNCTION COMPATIBLEWITH
74SERIES10
I
IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The ACT10 is an advanced high-speed CMOS
TRIPLE 3-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power
applications
mantaining
high
speed
operation similar to equivalent Bipolar Schottky
TTL.
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltagelevels.
All
inputs and
outputs
protectioncircuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
are
equipped with
PINCONNECTION AND IEC LOGICSYMBOLS
ORDER CODES :
74ACT10B
74ACT10M
M
(Micro Package)
B
(Plastic Package)
1/7
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