參數(shù)資料
型號: 74ACT11B
廠商: 意法半導(dǎo)體
英文描述: TRIPLE 3-INPUT AND GATE
中文描述: 3個三輸入與非門
文件頁數(shù): 1/7頁
文件大小: 67K
代理商: 74ACT11B
74ACT11
TRIPLE 3-INPUT AND GATE
PRELIMINARY DATA
May 1997
I
HIGH SPEED:t
PD
= 6.5 ns(TYP.) at V
CC
=5V
I
LOWPOWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTLOUTPUTS
V
IH
=2V (MIN), V
IL
=0.8V(MAX)
I
50
TRANSMISSIONLINEDRIVING
CAPABILITY
I
SYMMETRICALOUTPUT IMPEDANCE:
|I
OH
| = I
OL
=24 mA (MIN)
I
BALANCED PROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PIN AND FUNCTION COMPATIBLEWITH
74SERIES11
I
IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The ACT11 is an advanced high-speed CMOS
TRIPLE 3-INPUT AND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power
applications
mantaining
high
speed
operation similar to equivalent Bipolar Schottky
TTL.
The internal circuit is composed of 4 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltagelevels.
All
inputs and
outputs
protectioncircuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
are
equipped with
PINCONNECTION AND IEC LOGICSYMBOLS
ORDER CODES :
74ACT11B
74ACT11M
M
(Micro Package)
B
(Plastic Package)
1/7
相關(guān)PDF資料
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74ACT11M TRIPLE 3-INPUT AND GATE
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