參數(shù)資料
型號: 74ACT74SCX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Dual D-Type Flip-Flop
中文描述: ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封裝: 0.150 INCH, LEAD FREE, MS-012, SOIC-14
文件頁數(shù): 1/11頁
文件大?。?/td> 95K
代理商: 74ACT74SCX
74ACT74
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
April 1997
I
HIGH SPEED:
f
MAX
=250MHz (TYP.) atV
CC
=5V
I
LOWPOWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTLOUTPUTS
V
IH
=2V (MIN), V
IL
=0.8V(MAX)
I
50
TRANSMISSIONLINEDRIVING
CAPABILITY
I
SYMMETRICALOUTPUT IMPEDANCE:
|I
OH
| = I
OL
=24 mA (MIN)
I
BALANCED PROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PIN AND FUNCTION COMPATIBLEWITH
74SERIES74
I
IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The ACT74 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
and
double-layer
metal
technology.
A signal on the D INPUT is transferred to the Q
OUTPUT during the positive going transition of
wiring
C
2
MOS
the clock pulse.
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriateinput.
It is ideal for low power applications mantaining
high speed operationsimilar to equivalentBipolar
SchottkyTTL.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltagelevels.
All
inputs and
outputs
protectioncircuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
are
equipped with
PINCONNECTION AND IEC LOGICSYMBOLS
ORDER CODES :
74ACT74B
74ACT74M
M
(Micro Package)
B
(Plastic Package)
1/11
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