參數(shù)資料
型號: 74ACT86M
廠商: 意法半導(dǎo)體
英文描述: 8-Bit LVTTL-GTLP Adjustable-Edge-Rate Registered Transceiver with Split LVTTL Port and Feedback Path 48-TVSOP -40 to 85
中文描述: 四異或門
文件頁數(shù): 1/7頁
文件大?。?/td> 67K
代理商: 74ACT86M
74ACT86
QUAD EXCLUSIVE OR GATE
PRELIMINARY DATA
April 1997
I
HIGH SPEED:t
PD
= 5.0 ns(TYP.) at V
CC
=5V
I
LOWPOWER DISSIPATION:
I
CC
= 4
μ
A (MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTLOUTPUTS
V
IH
=2V (MIN), V
IL
=0.8V(MAX)
I
50
TRANSMISSIONLINEDRIVING
CAPABILITY
I
SYMMETRICALOUTPUT IMPEDANCE:
|I
OH
| = I
OL
=24 mA (MIN)
I
BALANCED PROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PIN AND FUNCTION COMPATIBLEWITH
74SERIES86
I
IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The ACT86 is an advanced high-speed CMOS
QUAD EXCLUSIVE OR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for ow power
applications mantaining high speed operation
similar to equivalent Bipolar Schottky TTL.
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stabeoutput.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltagelevels.
All
inputs and
outputs
protectioncircuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
are
equipped with
PINCONNECTION AND IEC LOGICSYMBOLS
ORDER CODES :
74ACT86B
74ACT86M
M
(Micro Package)
B
(Plastic Package)
1/7
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