參數(shù)資料
型號(hào): 74ACT899QMX
廠商: National Semiconductor Corporation
英文描述: 9-Bit Latchable Transceiver with Parity Generator/Checker
中文描述: 9位鎖存收發(fā)器奇偶發(fā)生器/檢查
文件頁(yè)數(shù): 8/14頁(yè)
文件大?。?/td> 214K
代理商: 74ACT899QMX
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
e b
0.5V
V
I
e
V
CC
a
0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
e b
0.5V
V
O
e
V
CC
a
0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
DC Latch-Up Source or
Sink Current
b
0.5V to
a
7.0V
b
20 mA
a
20 mA
b
0.5V to V
CC
a
0.5V
b
20 mA
a
20 mA
b
0.5V to V
CC
a
0.5V
g
50 mA
g
50 mA
b
65
§
C to
a
150
§
C
g
300 mA
Junction Temperature (T
J
)
CDIP
PDIP
175
§
C
140
§
C
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT
TM
circuits outside databook specifications.
Recommended Operating
Conditions
Supply Voltage (V
CC
)
’AC
’ACT
2.0V to 6.0V
4.5V to 5.5V
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
74AC/ACT
54ACT
0V to V
CC
0V to V
CC
b
40
§
C to
a
85
§
C
b
55
§
C to
a
125
§
C
Minimum Input Edge Rate
D
V/
D
t
’AC Devices
V
IN
from 30% to 70% of V
CC
V
CC
@
3.0V, 4.5V, 5.5V
Minimum Input Edge Rate
D
V/
D
t
’ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@
4.5V, 5.5V
Note:
PLCC packaging is not recommended for applications requiring great-
er than 2000 temperature cycles from
b
40
§
C to
a
125
§
C.
125 mV/ns
125 mV/ns
DC Electrical Characteristics for ’AC Family Devices
74AC
74AC
Symbol
Parameter
V
CC
(V)
T
A
e a
25
§
C
T
A
e
Units
Conditions
b
40
§
C to
a
85
§
C
Typ
Guaranteed Limits
V
IH
Minimum High Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
OUT
e
0.1V
or V
CC
b
0.1V
V
V
IL
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
OUT
e
0.1V
or V
CC
b
0.1V
V
V
OH
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
OUT
e b
50
m
A
V
*
V
IN
e
V
IL
or V
IH
3.0
4.5
5.5
2.56
3.86
4.86
2.46
3.76
4.76
V
b
12 mA
b
24 mA
b
24 mA
I
OH
V
OL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
OUT
e
50
m
A
V
*
V
IN
e
V
IL
or V
IH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
V
I
OL
I
IN
Maximum Input
Leakage Current
5.5
g
0.1
g
1.0
m
A
V
I
e
V
CC
, GND
(Note)
*
Maximum of 9 outputs loaded; thresholds on input associated with output under test.
8
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